lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Tue, 15 Dec 2015 14:04:46 +0100 From: Borislav Petkov <bp@...e.de> To: "Raj, Ashok" <ashok.raj@...el.com> Cc: Eduardo Habkost <ehabkost@...hat.com>, kvm@...r.kernel.org, Tony Luck <tony.luck@...el.com>, Gong Chen <gong.chen@...el.com>, Gleb Natapov <gleb@...nel.org>, linux-kernel@...r.kernel.org, qemu-devel@...gnu.org, Andi Kleen <andi.kleen@...el.com>, Paolo Bonzini <pbonzini@...hat.com> Subject: Re: [Qemu-devel] [Patch V2 1/2] x86, mce: Basic support to add LMCE support to QEMU On Mon, Dec 14, 2015 at 07:17:27PM -0500, Raj, Ashok wrote: > I can see how this hurts.. since the poller isn't doing cpu model > specific stuff..? The poller sees mca_cfg.ser set on an AMD guest and then the whole handling/decoding goes wrong. > in the LMCE case, even if you advertise MCG_LMCE_P in MCG_CAP, the > guest kernel wont call intel_init_lmce() only from mce_intel.c.. so > the same problem won't happen. You shouldn't advertise MCG_LMCE_P if the guest is not Intel. Those MCG bits should be in the CPU model descriptor X86CPUDefinition. -- Regards/Gruss, Boris. SUSE Linux GmbH, GF: Felix Imendörffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nürnberg) -- -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists