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Date:	Fri, 18 Dec 2015 20:27:36 +0800
From:	Hanjun Guo <guohanjun@...wei.com>
To:	Marc Zyngier <marc.zyngier@....com>, MaJun <majun258@...wei.com>,
	<Catalin.Marinas@....com>, <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>, <Will.Deacon@....com>,
	<mark.rutland@....com>, <jason@...edaemon.net>,
	<tglx@...utronix.de>, <lizefan@...wei.com>, <huxinwei@...wei.com>,
	<dingtianhong@...wei.com>, <zhaojunhua@...ilicon.com>,
	<liguozhu@...ilicon.com>, <xuwei5@...ilicon.com>,
	<wei.chenwei@...ilicon.com>, <wuyun.wu@...wei.com>,
	<guodong.xu@...aro.org>, <haojian.zhuang@...aro.org>,
	<zhangfei.gao@...aro.org>, <usman.ahmad@...aro.org>,
	<klimov.linux@...il.com>, <gabriele.paoloni@...wei.com>
Subject: Re: [PATCH v10 0/4] irqchip:support mbigen interrupt controller

Hi Marc, Mark,

On 2015/12/18 19:58, Marc Zyngier wrote:
> On 17/12/15 11:56, MaJun wrote:
>> From: Ma Jun <majun258@...wei.com>
>>
>> This patch set adds the driver of mbigen and binding document for Hisilicon
>> Mbigen chips.
> [...]
>
> I've reworked the nits noticed by Mark and stashed this in my
> irq/wire-msi-bridge branch.

I'm also following this patch set and I checked your tree in irq/wire-msi-bridge
branch, especially with the "num-pins" property/driver update, I think the code
in your tree is in good shape, thanks a lot for the review!

Thanks
Hanjun

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