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Message-Id: <1450636567-2040-5-git-send-email-plaes@plaes.org>
Date: Sun, 20 Dec 2015 20:35:58 +0200
From: Priit Laes <plaes@...es.org>
To: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Noralf Trønnes <noralf@...nnes.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: devel@...verdev.osuosl.org, linux-kernel@...r.kernel.org,
Priit Laes <plaes@...es.org>
Subject: [PATCH 04/13] staging: fbtft: Use standard MIPI DCS command defines for ili9163
This patch makes use of the standard MIPI Display Command Set to remove
some of the magic constants found in source code.
Signed-off-by: Priit Laes <plaes@...es.org>
---
drivers/staging/fbtft/fb_ili9163.c | 86 ++++++++++++++------------------------
1 file changed, 32 insertions(+), 54 deletions(-)
diff --git a/drivers/staging/fbtft/fb_ili9163.c b/drivers/staging/fbtft/fb_ili9163.c
index f31b3f4..cbcfbb5 100644
--- a/drivers/staging/fbtft/fb_ili9163.c
+++ b/drivers/staging/fbtft/fb_ili9163.c
@@ -22,6 +22,7 @@
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/delay.h>
+#include <video/mipi_display.h>
#include "fbtft.h"
@@ -38,32 +39,6 @@
#endif
/* ILI9163C commands */
-#define CMD_NOP 0x00 /* Non operation*/
-#define CMD_SWRESET 0x01 /* Soft Reset */
-#define CMD_SLPIN 0x10 /* Sleep ON */
-#define CMD_SLPOUT 0x11 /* Sleep OFF */
-#define CMD_PTLON 0x12 /* Partial Mode ON */
-#define CMD_NORML 0x13 /* Normal Display ON */
-#define CMD_DINVOF 0x20 /* Display Inversion OFF */
-#define CMD_DINVON 0x21 /* Display Inversion ON */
-#define CMD_GAMMASET 0x26 /* Gamma Set (0x01[1],0x02[2],0x04[3],0x08[4]) */
-#define CMD_DISPOFF 0x28 /* Display OFF */
-#define CMD_DISPON 0x29 /* Display ON */
-#define CMD_IDLEON 0x39 /* Idle Mode ON */
-#define CMD_IDLEOF 0x38 /* Idle Mode OFF */
-#define CMD_CLMADRS 0x2A /* Column Address Set */
-#define CMD_PGEADRS 0x2B /* Page Address Set */
-
-#define CMD_RAMWR 0x2C /* Memory Write */
-#define CMD_RAMRD 0x2E /* Memory Read */
-#define CMD_CLRSPACE 0x2D /* Color Space : 4K/65K/262K */
-#define CMD_PARTAREA 0x30 /* Partial Area */
-#define CMD_VSCLLDEF 0x33 /* Vertical Scroll Definition */
-#define CMD_TEFXLON 0x34 /* Tearing Effect Line ON */
-#define CMD_TEFXLOF 0x35 /* Tearing Effect Line OFF */
-#define CMD_MADCTL 0x36 /* Memory Access Control */
-
-#define CMD_PIXFMT 0x3A /* Interface Pixel Format */
#define CMD_FRMCTR1 0xB1 /* Frame Rate Control
(In normal mode/Full colors) */
#define CMD_FRMCTR2 0xB2 /* Frame Rate Control (In Idle mode/8-colors) */
@@ -113,16 +88,17 @@ static int init_display(struct fbtft_par *par)
if (par->gpio.cs != -1)
gpio_set_value(par->gpio.cs, 0); /* Activate chip */
- write_reg(par, CMD_SWRESET); /* software reset */
+ write_reg(par, MIPI_DCS_SOFT_RESET); /* software reset */
mdelay(500);
- write_reg(par, CMD_SLPOUT); /* exit sleep */
+ write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE); /* exit sleep */
mdelay(5);
- write_reg(par, CMD_PIXFMT, 0x05); /* Set Color Format 16bit */
- write_reg(par, CMD_GAMMASET, 0x02); /* default gamma curve 3 */
+ write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
+ /* default gamma curve 3 */
+ write_reg(par, MIPI_DCS_SET_GAMMA_CURVE, 0x02);
#ifdef GAMMA_ADJ
write_reg(par, CMD_GAMRSEL, 0x01); /* Enable Gamma adj */
#endif
- write_reg(par, CMD_NORML);
+ write_reg(par, MIPI_DCS_ENTER_NORMAL_MODE);
write_reg(par, CMD_DFUNCTR, 0xff, 0x06);
/* Frame Rate Control (In normal mode/Full colors) */
write_reg(par, CMD_FRMCTR1, 0x08, 0x02);
@@ -135,11 +111,11 @@ static int init_display(struct fbtft_par *par)
write_reg(par, CMD_VCOMCTR1, 0x50, 0x63);
write_reg(par, CMD_VCOMOFFS, 0);
- write_reg(par, CMD_CLMADRS, 0, 0, 0, WIDTH); /* Set Column Address */
- write_reg(par, CMD_PGEADRS, 0, 0, 0, HEIGHT); /* Set Page Address */
+ write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, 0, 0, 0, WIDTH);
+ write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, 0, 0, 0, HEIGHT);
- write_reg(par, CMD_DISPON); /* display ON */
- write_reg(par, CMD_RAMWR); /* Memory Write */
+ write_reg(par, MIPI_DCS_SET_DISPLAY_ON); /* display ON */
+ write_reg(par, MIPI_DCS_WRITE_MEMORY_START); /* Memory Write */
return 0;
}
@@ -149,30 +125,31 @@ static void set_addr_win(struct fbtft_par *par, int xs, int ys,
{
switch (par->info->var.rotate) {
case 0:
- write_reg(par, CMD_CLMADRS, xs >> 8, xs & 0xff, xe >> 8,
- xe & 0xff);
- write_reg(par, CMD_PGEADRS,
- (ys + __OFFSET) >> 8, (ys + __OFFSET) & 0xff,
- (ye + __OFFSET) >> 8, (ye + __OFFSET) & 0xff);
+ write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+ xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
+ write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+ (ys + __OFFSET) >> 8, (ys + __OFFSET) & 0xff,
+ (ye + __OFFSET) >> 8, (ye + __OFFSET) & 0xff);
break;
case 90:
- write_reg(par, CMD_CLMADRS,
- (xs + __OFFSET) >> 8, (xs + __OFFSET) & 0xff,
- (xe + __OFFSET) >> 8, (xe + __OFFSET) & 0xff);
- write_reg(par, CMD_PGEADRS, ys >> 8, ys & 0xff, ye >> 8,
- ye & 0xff);
+ write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+ (xs + __OFFSET) >> 8, (xs + __OFFSET) & 0xff,
+ (xe + __OFFSET) >> 8, (xe + __OFFSET) & 0xff);
+ write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+ ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
break;
case 180:
case 270:
- write_reg(par, CMD_CLMADRS, xs >> 8, xs & 0xff, xe >> 8,
- xe & 0xff);
- write_reg(par, CMD_PGEADRS, ys >> 8, ys & 0xff, ye >> 8,
- ye & 0xff);
+ write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+ xs >> 8, xs & 0xff, xe >> 8, xe & 0xff);
+ write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+ ys >> 8, ys & 0xff, ye >> 8, ye & 0xff);
break;
default:
- par->info->var.rotate = 0; /* Fix incorrect setting */
+ /* Fix incorrect setting */
+ par->info->var.rotate = 0;
}
- write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */
+ write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
}
/*
@@ -217,8 +194,8 @@ static int set_var(struct fbtft_par *par)
/* Colorspcae */
if (par->bgr)
mactrl_data |= (1 << 2);
- write_reg(par, CMD_MADCTL, mactrl_data);
- write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */
+ write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, mactrl_data);
+ write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
return 0;
}
@@ -254,7 +231,8 @@ static int gamma_adj(struct fbtft_par *par, unsigned long *curves)
CURVE(0, 15)
);
- write_reg(par, CMD_RAMWR); /* Write Data to GRAM mode */
+ /* Write Data to GRAM mode */
+ write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
return 0;
}
--
2.6.4
--
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