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Message-Id: <4753CD2F-914D-44D5-BD18-8DF94068315D@theobroma-systems.com>
Date: Mon, 21 Dec 2015 19:39:35 +0100
From: "Dr. Philipp Tomsich" <philipp.tomsich@...obroma-systems.com>
To: Arnd Bergmann <arnd@...db.de>
Cc: Catalin Marinas <catalin.marinas@....com>,
Andrew Pinski <pinskia@...il.com>,
"Joseph S. Myers" <joseph@...esourcery.com>,
"Kapoor, Prasun" <Prasun.Kapoor@...iumnetworks.com>,
broonie@...nel.org, Nathan Lynch <Nathan_Lynch@...tor.com>,
LKML <linux-kernel@...r.kernel.org>,
Alexander Graf <agraf@...e.de>,
Alexey Klimov <klimov.linux@...il.com>,
Yury Norov <ynorov@...iumnetworks.com>,
Jan Dakinevich <jan.dakinevich@...il.com>,
Andrew Pinski <apinski@...ium.com>,
David Daney <ddaney.cavm@...il.com>,
Andreas Schwab <schwab@...e.de>,
"Zhangjian (Bamvor)" <bamvor.zhangjian@...wei.com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
Christoph Müllner
<christoph.muellner@...obroma-systems.com>,
Marcus Shawcroft <Marcus.Shawcroft@....com>
Subject: Re: [PATCH v6 12/20] arm64:ilp32: add sys_ilp32.c and a separate table (in entry.S) to use it
> On 18 Dec 2015, at 13:47, Arnd Bergmann <arnd@...db.de> wrote:
>
>> 3. Follow the PCS up to glibc but always pass syscall arguments in W
>> registers, like AArch32 compat support (the least preferred option,
>> the only advantage is a single wrapper for all syscalls but it would
>> be doing unnecessary zeroing even for syscalls where it isn't needed)
>
> This would mean we cannot pass 64-bit arguments in registers, right?
Note that there’s no 32bit registers (the ‘w’-form always refers to the lower
32bits of a 64bit register, with implicit zero-extension)… and load/store
instructions always use the full base-register (‘x’-form) for address calculation.
I.e. a load/store would inadvertently pickup “random garbage” in the upper
32bits, if no explicit zero-extension is applied.
In other words: all zero-extensions for 32bit arguments should be explicit
on the kernel side.
Regards,
Philipp.
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