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Message-ID: <E959C4978C3B6342920538CF579893F00AF0655A@SHSMSX104.ccr.corp.intel.com>
Date: Tue, 22 Dec 2015 06:59:25 +0000
From: "Wu, Feng" <feng.wu@...el.com>
To: Yang Zhang <yang.zhang.wz@...il.com>,
"pbonzini@...hat.com" <pbonzini@...hat.com>,
"rkrcmar@...hat.com" <rkrcmar@...hat.com>
CC: "kvm@...r.kernel.org" <kvm@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Jiang Liu (jiang.liu@...ux.intel.com)" <jiang.liu@...ux.intel.com>,
"Wu, Feng" <feng.wu@...el.com>
Subject: RE: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver
lowest-priority interrupts
> -----Original Message-----
> From: Yang Zhang [mailto:yang.zhang.wz@...il.com]
> Sent: Tuesday, December 22, 2015 2:49 PM
> To: Wu, Feng <feng.wu@...el.com>; pbonzini@...hat.com;
> rkrcmar@...hat.com
> Cc: kvm@...r.kernel.org; linux-kernel@...r.kernel.org; Jiang Liu
> (jiang.liu@...ux.intel.com) <jiang.liu@...ux.intel.com>
> Subject: Re: [PATCH v2 1/2] KVM: x86: Use vector-hashing to deliver lowest-
> priority interrupts
>
> >>>>
> >>>> On 2015/12/16 9:37, Feng Wu wrote:
> >>>>> Use vector-hashing to deliver lowest-priority interrupts, As an
> >>>>> example, modern Intel CPUs in server platform use this method to
> >>>>> handle lowest-priority interrupts.
> >>>>>
> >>>>> Signed-off-by: Feng Wu <feng.wu@...el.com>
> >>>>> ---
> >>>>> arch/x86/kvm/irq_comm.c | 27 ++++++++++++++++++-----
> >>>>> arch/x86/kvm/lapic.c | 57
> >>>> ++++++++++++++++++++++++++++++++++++++++---------
> >>>>> arch/x86/kvm/lapic.h | 2 ++
> >>>>> arch/x86/kvm/x86.c | 9 ++++++++
> >>>>> arch/x86/kvm/x86.h | 1 +
> >>>>> 5 files changed, 81 insertions(+), 15 deletions(-)
> >>>>>
> >>>>> bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic
> >> *src,
> >>>>> struct kvm_lapic_irq *irq, int *r, unsigned long
> *dest_map)
> >>>>> {
> >>>>> @@ -731,17 +747,38 @@ bool kvm_irq_delivery_to_apic_fast(struct kvm
> >>>> *kvm, struct kvm_lapic *src,
> >>>>> dst = map->logical_map[cid];
> >>>>>
> >>>>> if (kvm_lowest_prio_delivery(irq)) {
> >>>>> - int l = -1;
> >>>>> - for_each_set_bit(i, &bitmap, 16) {
> >>>>> - if (!dst[i])
> >>>>> - continue;
> >>>>> - if (l < 0)
> >>>>> - l = i;
> >>>>> - else if (kvm_apic_compare_prio(dst[i]->vcpu,
> >>>> dst[l]->vcpu) < 0)
> >>>>> - l = i;
> >>>>> + if (!kvm_vector_hashing_enabled()) {
> >>>>> + int l = -1;
> >>>>> + for_each_set_bit(i, &bitmap, 16) {
> >>>>> + if (!dst[i])
> >>>>> + continue;
> >>>>> + if (l < 0)
> >>>>> + l = i;
> >>>>> + else if (kvm_apic_compare_prio(dst[i]-
> >>>>> vcpu, dst[l]->vcpu) < 0)
> >>>>> + l = i;
> >>>>> + }
> >>>>> + bitmap = (l >= 0) ? 1 << l : 0;
> >>>>> + } else {
> >>>>> + int idx = 0;
> >>>>> + unsigned int dest_vcpus = 0;
> >>>>> +
> >>>>> + for_each_set_bit(i, &bitmap, 16) {
> >>>>> + if (!dst[i]
> >>>> && !kvm_lapic_enabled(dst[i]->vcpu)) {
> >>>>
> >>>> It should be or(||) not and (&&).
> >>>
> >>> Oh, you are right! My negligence! Thanks for pointing this out, Yang!
> >>
> >> btw, i think the kvm_lapic_enabled check is wrong here? Why need it here?
> >
> > If the lapic is not enabled, I think we cannot recognize it as a candidate, can
> we?
> > Maybe Radim can confirm this, Radim, what is your option?
>
> Lapic can be disable by hw or sw. Here we only need to check the hw is
> enough which is already covered while injecting the interrupt into
> guest. I remember we(Glab, Macelo and me) have discussed it several ago,
> but i cannot find the mail thread.
But if the lapic is disabled by software, we cannot still inject interrupts to
it, can we?
Thanks,
Feng
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