linux-kernel - Re: [PATCH v3 75/77] ncr5380: Enable PDMA for DTC chips

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Message-ID: <567904F9.8060102@suse.de>
Date:	Tue, 22 Dec 2015 09:08:25 +0100
From:	Hannes Reinecke <hare@...e.de>
To:	Finn Thain <fthain@...egraphics.com.au>,
	"James E.J. Bottomley" <JBottomley@...n.com>,
	Michael Schmitz <schmitzmic@...il.com>,
	linux-m68k@...r.kernel.org, linux-scsi@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	"Martin K. Petersen" <martin.petersen@...cle.com>
Cc:	Ondrej Zary <linux@...nbow-software.org>
Subject: Re: [PATCH v3 75/77] ncr5380: Enable PDMA for DTC chips

On 12/22/2015 02:18 AM, Finn Thain wrote:
> From: Ondrej Zary <linux@...nbow-software.org>
>
> Add I/O register mapping for DTC chips and enable PDMA mode.
>
> These chips have 16-bit wide HOST BUFFER register and it must be read
> by 16-bit accesses (we lose data otherwise).
>
> Large PIO transfers crash at least the DTCT-436P chip (all reads result
> in 0xFF) so this patch actually makes it work.
>
> The chip also crashes when we bang on the C400 host status register too
> heavily after PDMA write - a small udelay is needed.
>
> Tested on DTCT-436P and verified that it does not break 53C400A.
>
> Signed-off-by: Ondrej Zary <linux@...nbow-software.org>
> Signed-off-by: Finn Thain <fthain@...egraphics.com.au>
>
Reviewed-by: Hannes Reinecke <hare@...e.com>

Cheers,

Hannes
-- 
Dr. Hannes Reinecke		      zSeries & Storage
hare@...e.de			      +49 911 74053 688
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg
GF: J. Hawn, J. Guild, F. Imendörffer, HRB 16746 (AG Nürnberg)
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