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Message-ID: <87lh8jqtuj.fsf@eliezer.anholt.net>
Date:	Thu, 24 Dec 2015 16:01:40 -0800
From:	Eric Anholt <eric@...olt.net>
To:	Arnd Bergmann <arnd@...db.de>,
	Alexander Aring <alex.aring@...il.com>
Cc:	linux-rpi-kernel@...ts.infradead.org,
	Mark Rutland <mark.rutland@....com>,
	devicetree@...r.kernel.org,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Florian Fainelli <f.fainelli@...il.com>,
	Jason Cooper <jason@...edaemon.net>,
	Scott Branden <sbranden@...adcom.com>,
	Marc Zyngier <marc.zyngier@....com>,
	Ray Jui <rjui@...adcom.com>, linux-kernel@...r.kernel.org,
	Rob Herring <robh+dt@...nel.org>,
	bcm-kernel-feedback-list@...adcom.com,
	Kumar Gala <galak@...eaurora.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v2 0/8] Raspberry Pi 2 support.

Arnd Bergmann <arnd@...db.de> writes:

> On Tuesday 22 December 2015, Alexander Aring wrote:
>> Later while booting the kernel hangs forever, the solution on my side
>> was to enable:
>> 
>> CONFIG_HAVE_ARM_ARCH_TIMER
>> 
>> I think this doesn't use the BCM2835 timer anymore and some cortex-a7
>> related "generic timer", or?
>
> Right, but I don't see how that relates to the irqchip. Is the BCM2835 timer
> connected to a secondary irqchip, while the arch timer connects to the primary GIC?

The 2835 timer is a "peripheral", and connects to the second level
irqchip, while the arm arch timer can give us per-cpu interrupts in the
first level controller.

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