| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20151228092738.5cba56da@bbrezillon>
Date: Mon, 28 Dec 2015 09:27:38 +0100
From: Boris Brezillon <boris.brezillon@...e-electrons.com>
To: Harvey Hunt <harvey.hunt@...tec.com>
Cc: <linux-mtd@...ts.infradead.org>, <computersforpeace@...il.com>,
<alex@...x-smith.me.uk>, Alex Smith <alex.smith@...tec.com>,
"Zubair Lutfullah Kakakhel" <Zubair.Kakakhel@...tec.com>,
David Woodhouse <dwmw2@...radead.org>,
Paul Burton <paul.burton@...tec.com>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-mips@...ux-mips.org>, <robh@...nel.org>
Subject: Re: [PATCH v10 3/3] MIPS: dts: jz4780/ci20: Add NEMC, BCH and NAND
device tree nodes
On Thu, 24 Dec 2015 12:20:15 +0000
Harvey Hunt <harvey.hunt@...tec.com> wrote:
> From: Alex Smith <alex.smith@...tec.com>
>
> Add device tree nodes for the NEMC and BCH to the JZ4780 device tree,
> and make use of them in the Ci20 device tree to add a node for the
> board's NAND.
>
> Note that since the pinctrl driver is not yet upstream, this includes
> neither pin configuration nor busy/write-protect GPIO pins for the
> NAND. Use of the NAND relies on the boot loader to have left the pins
> configured in a usable state, which should be the case when booted
> from the NAND.
>
> Signed-off-by: Alex Smith <alex.smith@...tec.com>
> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@...tec.com>
> Cc: David Woodhouse <dwmw2@...radead.org>
> Cc: Brian Norris <computersforpeace@...il.com>
> Cc: Paul Burton <paul.burton@...tec.com>
> Cc: linux-mtd@...ts.infradead.org
> Cc: devicetree@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> Cc: linux-mips@...ux-mips.org
> Cc: robh@...nel.org
> Signed-off-by: Harvey Hunt <harvey.hunt@...tec.com>
Reviewed-by: Boris Brezillon <boris.brezillon@...e-electrons.com>
> ---
> v9 -> v10:
> - No change.
>
> v8 -> v9:
> - Represent the partition table as a subnode of a NAND chip.
>
> v7 -> v8:
> - Describe the NAND chips as children nodes of the NAND controller.
> - Remove ingenic, prefix from ECC settings.
> - Renamed some ECC settings.
>
> v6 -> v7:
> - Add nand-ecc-mode to DT.
> - Add nand-on-flash-bbt to DT.
>
> v4 -> v5:
> - New patch adding DT nodes for the NAND so that the driver can be
> tested.
>
> arch/mips/boot/dts/ingenic/ci20.dts | 63 ++++++++++++++++++++++++++++++++++
> arch/mips/boot/dts/ingenic/jz4780.dtsi | 26 ++++++++++++++
> 2 files changed, 89 insertions(+)
>
> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
> index 9fcb9e7..782258c 100644
> --- a/arch/mips/boot/dts/ingenic/ci20.dts
> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
> @@ -42,3 +42,66 @@
> &uart4 {
> status = "okay";
> };
> +
> +&nemc {
> + status = "okay";
> +
> + nandc: nand-controller@1 {
> + compatible = "ingenic,jz4780-nand";
> + reg = <1 0 0x1000000>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ingenic,bch-controller = <&bch>;
> +
> + ingenic,nemc-tAS = <10>;
> + ingenic,nemc-tAH = <5>;
> + ingenic,nemc-tBP = <10>;
> + ingenic,nemc-tAW = <15>;
> + ingenic,nemc-tSTRV = <100>;
> +
> + nand@1 {
> + reg = <1>;
> +
> + nand-ecc-step-size = <1024>;
> + nand-ecc-strength = <24>;
> + nand-ecc-mode = "hw";
> + nand-on-flash-bbt;
> +
> + partitions {
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + partition@0 {
> + label = "u-boot-spl";
> + reg = <0x0 0x0 0x0 0x800000>;
> + };
> +
> + partition@...00000 {
> + label = "u-boot";
> + reg = <0x0 0x800000 0x0 0x200000>;
> + };
> +
> + partition@...00000 {
> + label = "u-boot-env";
> + reg = <0x0 0xa00000 0x0 0x200000>;
> + };
> +
> + partition@...00000 {
> + label = "boot";
> + reg = <0x0 0xc00000 0x0 0x4000000>;
> + };
> +
> + partition@...c00000 {
> + label = "system";
> + reg = <0x0 0x4c00000 0x1 0xfb400000>;
> + };
> + };
> + };
> + };
> +};
> +
> +&bch {
> + status = "okay";
> +};
> diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> index 65389f6..b868b42 100644
> --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
> +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
> @@ -108,4 +108,30 @@
>
> status = "disabled";
> };
> +
> + nemc: nemc@...10000 {
> + compatible = "ingenic,jz4780-nemc";
> + reg = <0x13410000 0x10000>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges = <1 0 0x1b000000 0x1000000
> + 2 0 0x1a000000 0x1000000
> + 3 0 0x19000000 0x1000000
> + 4 0 0x18000000 0x1000000
> + 5 0 0x17000000 0x1000000
> + 6 0 0x16000000 0x1000000>;
> +
> + clocks = <&cgu JZ4780_CLK_NEMC>;
> +
> + status = "disabled";
> + };
> +
> + bch: bch@...d0000 {
> + compatible = "ingenic,jz4780-bch";
> + reg = <0x134d0000 0x10000>;
> +
> + clocks = <&cgu JZ4780_CLK_BCH>;
> +
> + status = "disabled";
> + };
> };
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists