linux-kernel - Re: [PATCH v1 2/3] ARM64 LPC: LPC driver implementation

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Message-ID: <2007093.hGYRGHCjMe@wuerfel>
Date:	Tue, 29 Dec 2015 15:11:07 +0100
From:	Arnd Bergmann <arnd@...db.de>
To:	Rongrong Zou <zourongrong@...wei.com>
Cc:	Rongrong Zou <zourongrong@...il.com>, minyard@....org,
	gregkh@...uxfoundation.org, catalin.marinas@....com,
	will.deacon@....com, linuxarm@...wei.com,
	linux-kernel@...r.kernel.org, benh@...nel.crashing.org,
	lijianhua@...wei.com
Subject: Re: [PATCH v1 2/3] ARM64 LPC: LPC driver implementation

On Tuesday 29 December 2015 22:03:14 Rongrong Zou wrote:
> 在 2015/12/29 21:51, Arnd Bergmann 写道:
> > On Tuesday 29 December 2015 21:33:51 Rongrong Zou wrote:
> >> We only implement io cycles here, we hook the lpc_io_write_byte
> >> and lpc_io_read_byte to inb/outb. So the drivers(ipmi/uart) which access
> >> the legacy ISA I/O port need no modification.
> >>
> >> The low pin count specification is at
> >> http://www.intel.com/design/chipsets/industry/lpc.htm
> >>
> >> Signed-off-by: Rongrong Zou <zourongrong@...il.com>
> >
> > I'm slightly confused here: I thought this driver was hisilicon specific.
> > Is the MMIO register layout that is used in this hardware actually standardized
> > in a way that the driver also works for all other implementations?
> 
> The register defined is not standardized. other vendors may define their own
> registers.

Ok, please clarify this in the patch description, the Kconfig help text and
the DT binding then.

	Arnd
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