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Message-ID: <20151231222946.GA21265@rob-hp-laptop>
Date: Thu, 31 Dec 2015 16:29:46 -0600
From: Rob Herring <robh@...nel.org>
To: Jiancheng Xue <xuejiancheng@...wei.com>
Cc: mturquette@...libre.com, sboyd@...eaurora.org, pawel.moll@....com,
mark.rutland@....com, ijc+devicetree@...lion.org.uk,
galak@...eaurora.org, linux@....linux.org.uk, khilman@...aro.org,
arnd@...db.de, olof@...om.net, xuwei5@...ilicon.com,
haojian.zhuang@...aro.org, zhangfei.gao@...aro.org,
bintian.wang@...wei.com, linux-kernel@...r.kernel.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, yanhaifeng@...ilicon.com,
yanghongwei@...ilicon.com, suwenping@...ilicon.com,
ml.yang@...ilicon.com, gaofei@...ilicon.com,
zhangzhenxing@...ilicon.com
Subject: Re: [PATCH v4 1/6] clk: hisilicon: add CRG driver for hi3519 soc
On Wed, Dec 30, 2015 at 09:43:47AM +0800, Jiancheng Xue wrote:
> The CRG(Clock and Reset Generator) block provides clock
> and reset signals for other modules in hi3519 soc.
>
> Signed-off-by: Jiancheng Xue <xuejiancheng@...wei.com>
> ---
> .../devicetree/bindings/clock/hi3519-crg.txt | 46 +++++++
For the binding:
Acked-by: Rob Herring <robh@...nel.org>
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