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Message-ID: <1451881723-2478-5-git-send-email-milo.kim@ti.com>
Date: Mon, 4 Jan 2016 13:28:28 +0900
From: Milo Kim <milo.kim@...com>
To: <tglx@...utronix.de>
CC: <jason@...edaemon.net>, <marc.zyngier@....com>,
<alexandre.belloni@...e-electrons.com>,
<boris.brezillon@...e-electrons.com>,
<ludovic.desroches@...el.com>, <nicolas.ferre@...el.com>,
<linux-kernel@...r.kernel.org>, Milo Kim <milo.kim@...com>
Subject: [PATCH 04/19] irqchip: atmel-aic: replace magic numbers with named constant
One AIC IRQ chip can have 32 interrupt source.
To enhance code readability, magic number is replaced with named constant,
'AIC_IRQS_PER_CHIP'.
aic_hw_init() initializes vector registers up to total number of
AIC interrupts. This magic number is replaced with NR_AIC_IRQS.
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Marc Zyngier <marc.zyngier@....com>
Cc: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc: Boris BREZILLON <boris.brezillon@...e-electrons.com>
Cc: Ludovic Desroches <ludovic.desroches@...el.com>
Cc: Nicolas Ferre <nicolas.ferre@...el.com>
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Milo Kim <milo.kim@...com>
---
drivers/irqchip/irq-atmel-aic-common.c | 11 ++++++-----
drivers/irqchip/irq-atmel-aic-common.h | 1 +
drivers/irqchip/irq-atmel-aic.c | 2 +-
drivers/irqchip/irq-atmel-aic5.c | 4 ++--
4 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/irqchip/irq-atmel-aic-common.c b/drivers/irqchip/irq-atmel-aic-common.c
index ef2c619..5effd52 100644
--- a/drivers/irqchip/irq-atmel-aic-common.c
+++ b/drivers/irqchip/irq-atmel-aic-common.c
@@ -135,7 +135,7 @@ static void __init aic_common_ext_irq_of_init(struct irq_domain *domain)
}
aic = gc->private;
- aic->ext_irqs |= (1 << (hwirq % 32));
+ aic->ext_irqs |= (1 << (hwirq % AIC_IRQS_PER_CHIP));
}
}
@@ -151,7 +151,7 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
int ret;
int i;
- nchips = DIV_ROUND_UP(nirqs, 32);
+ nchips = DIV_ROUND_UP(nirqs, AIC_IRQS_PER_CHIP);
reg_base = of_iomap(node, 0);
if (!reg_base)
@@ -163,13 +163,14 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
goto err_iounmap;
}
- domain = irq_domain_add_linear(node, nchips * 32, ops, aic);
+ domain = irq_domain_add_linear(node, nchips * AIC_IRQS_PER_CHIP, ops,
+ aic);
if (!domain) {
ret = -ENOMEM;
goto err_free_aic;
}
- ret = irq_alloc_domain_generic_chips(domain, 32, 1, name,
+ ret = irq_alloc_domain_generic_chips(domain, AIC_IRQS_PER_CHIP, 1, name,
handle_fasteoi_irq,
IRQ_NOREQUEST | IRQ_NOPROBE |
IRQ_NOAUTOEN, 0, 0);
@@ -177,7 +178,7 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
goto err_domain_remove;
for (i = 0; i < nchips; i++) {
- gc = irq_get_domain_generic_chip(domain, i * 32);
+ gc = irq_get_domain_generic_chip(domain, i * AIC_IRQS_PER_CHIP);
gc->reg_base = reg_base;
diff --git a/drivers/irqchip/irq-atmel-aic-common.h b/drivers/irqchip/irq-atmel-aic-common.h
index c178557..4c0b471 100644
--- a/drivers/irqchip/irq-atmel-aic-common.h
+++ b/drivers/irqchip/irq-atmel-aic-common.h
@@ -16,6 +16,7 @@
#ifndef __IRQ_ATMEL_AIC_COMMON_H
#define __IRQ_ATMEL_AIC_COMMON_H
+#define AIC_IRQS_PER_CHIP 32
int aic_common_set_type(struct irq_data *d, unsigned type, unsigned *val);
diff --git a/drivers/irqchip/irq-atmel-aic.c b/drivers/irqchip/irq-atmel-aic.c
index 6fcd680..c499949 100644
--- a/drivers/irqchip/irq-atmel-aic.c
+++ b/drivers/irqchip/irq-atmel-aic.c
@@ -164,7 +164,7 @@ static void __init aic_hw_init(struct irq_domain *domain)
irq_reg_writel(gc, 0xffffffff, AT91_AIC_IDCR);
irq_reg_writel(gc, 0xffffffff, AT91_AIC_ICCR);
- for (i = 0; i < 32; i++)
+ for (i = 0; i < NR_AIC_IRQS; i++)
irq_reg_writel(gc, i, AT91_AIC_SVR(i));
}
diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c
index 8b8f5e2..f5848c8 100644
--- a/drivers/irqchip/irq-atmel-aic5.c
+++ b/drivers/irqchip/irq-atmel-aic5.c
@@ -306,9 +306,9 @@ static int __init aic5_of_init(struct device_node *node,
return PTR_ERR(domain);
aic5_domain = domain;
- nchips = aic5_domain->revmap_size / 32;
+ nchips = aic5_domain->revmap_size / AIC_IRQS_PER_CHIP;
for (i = 0; i < nchips; i++) {
- gc = irq_get_domain_generic_chip(domain, i * 32);
+ gc = irq_get_domain_generic_chip(domain, i * AIC_IRQS_PER_CHIP);
gc->chip_types[0].regs.eoi = AT91_AIC5_EOICR;
gc->chip_types[0].chip.irq_mask = aic5_mask;
--
2.6.4
--
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