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Message-ID: <1451881723-2478-12-git-send-email-milo.kim@ti.com>
Date: Mon, 4 Jan 2016 13:28:35 +0900
From: Milo Kim <milo.kim@...com>
To: <tglx@...utronix.de>
CC: <jason@...edaemon.net>, <marc.zyngier@....com>,
<alexandre.belloni@...e-electrons.com>,
<boris.brezillon@...e-electrons.com>,
<ludovic.desroches@...el.com>, <nicolas.ferre@...el.com>,
<linux-kernel@...r.kernel.org>, Milo Kim <milo.kim@...com>
Subject: [PATCH 11/19] irqchip: atmel-aic: add common PM IRQ chip operation
To control IDCR, IECR and ICCR, AIC5 selects the number by checking
each mask bit. AIC provides simple register access.
This patch unifies suspend/resume/pm_shutdown operation.
aic_common_shutdown() is renamed as aic_irq_shutdown() to differentiate it
from aic_pm_shutdowm().
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Marc Zyngier <marc.zyngier@....com>
Cc: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc: Boris BREZILLON <boris.brezillon@...e-electrons.com>
Cc: Ludovic Desroches <ludovic.desroches@...el.com>
Cc: Nicolas Ferre <nicolas.ferre@...el.com>
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Milo Kim <milo.kim@...com>
---
drivers/irqchip/irq-atmel-aic-common.c | 113 ++++++++++++++++++++++++++++++++-
drivers/irqchip/irq-atmel-aic.c | 39 ------------
drivers/irqchip/irq-atmel-aic5.c | 71 ---------------------
3 files changed, 110 insertions(+), 113 deletions(-)
diff --git a/drivers/irqchip/irq-atmel-aic-common.c b/drivers/irqchip/irq-atmel-aic-common.c
index 4c404f9..3a723f4 100644
--- a/drivers/irqchip/irq-atmel-aic-common.c
+++ b/drivers/irqchip/irq-atmel-aic-common.c
@@ -186,7 +186,7 @@ static const struct irq_domain_ops aic_irq_ops = {
.xlate = aic_irq_domain_xlate,
};
-static void aic_common_shutdown(struct irq_data *d)
+static void aic_irq_shutdown(struct irq_data *d)
{
struct irq_chip_type *ct = irq_data_get_chip_type(d);
@@ -301,6 +301,109 @@ static int aic_set_type(struct irq_data *d, unsigned int type)
return 0;
}
+#ifdef CONFIG_PM
+
+enum aic_pm_mode {
+ AIC_PM_SUSPEND,
+ AIC_PM_RESUME,
+};
+
+static void aic_pm_ctrl_ssr(struct irq_data *d, enum aic_pm_mode mode)
+{
+ struct irq_domain *domain = d->domain;
+ struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);
+ struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+ u32 mask;
+ u32 which;
+ int i;
+
+ if (mode == AIC_PM_SUSPEND)
+ which = gc->wake_active;
+ else
+ which = gc->mask_cache;
+
+ irq_gc_lock(bgc);
+
+ for (i = 0; i < AIC_IRQS_PER_CHIP; i++) {
+ mask = 1 << i;
+ if ((mask & gc->mask_cache) == (mask & gc->wake_active))
+ continue;
+
+ irq_reg_writel(bgc, i + gc->irq_base, aic_reg_data->ssr);
+
+ if (mask & which)
+ irq_reg_writel(bgc, 1, aic_reg_data->iecr);
+ else
+ irq_reg_writel(bgc, 1, aic_reg_data->idcr);
+ }
+
+ irq_gc_unlock(bgc);
+}
+
+static void aic_pm_ctrl(struct irq_data *d, enum aic_pm_mode mode)
+{
+ struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+ u32 mask_idcr;
+ u32 mask_iecr;
+
+ if (mode == AIC_PM_SUSPEND) {
+ mask_idcr = gc->mask_cache;
+ mask_iecr = gc->wake_active;
+ } else {
+ mask_idcr = gc->wake_active;
+ mask_iecr = gc->mask_cache;
+ }
+
+ irq_gc_lock(gc);
+ irq_reg_writel(gc, mask_idcr, aic_reg_data->idcr);
+ irq_reg_writel(gc, mask_iecr, aic_reg_data->iecr);
+ irq_gc_unlock(gc);
+}
+
+static void aic_suspend(struct irq_data *d)
+{
+ if (aic_is_ssr_used())
+ aic_pm_ctrl_ssr(d, AIC_PM_SUSPEND);
+ else
+ aic_pm_ctrl(d, AIC_PM_SUSPEND);
+}
+
+static void aic_resume(struct irq_data *d)
+{
+ if (aic_is_ssr_used())
+ aic_pm_ctrl_ssr(d, AIC_PM_RESUME);
+ else
+ aic_pm_ctrl(d, AIC_PM_RESUME);
+}
+
+static void aic_pm_shutdown(struct irq_data *d)
+{
+ struct irq_domain *domain = d->domain;
+ struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);
+ struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
+ int i;
+
+ if (aic_is_ssr_used()) {
+ irq_gc_lock(bgc);
+ for (i = 0; i < AIC_IRQS_PER_CHIP; i++) {
+ irq_reg_writel(bgc, i + gc->irq_base, aic_reg_data->ssr);
+ irq_reg_writel(bgc, 1, aic_reg_data->idcr);
+ irq_reg_writel(bgc, 1, aic_reg_data->iccr);
+ }
+ irq_gc_unlock(bgc);
+ } else {
+ irq_gc_lock(gc);
+ irq_reg_writel(gc, 0xffffffff, aic_reg_data->idcr);
+ irq_reg_writel(gc, 0xffffffff, aic_reg_data->iccr);
+ irq_gc_unlock(gc);
+ }
+}
+#else
+#define aic_suspend NULL
+#define aic_resume NULL
+#define aic_pm_shutdown NULL
+#endif /* CONFIG_PM */
+
static void __init aic_common_ext_irq_of_init(struct irq_domain *domain)
{
struct device_node *node = irq_domain_get_of_node(domain);
@@ -369,17 +472,21 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
gc = irq_get_domain_generic_chip(domain, i * AIC_IRQS_PER_CHIP);
gc->reg_base = reg_base;
-
gc->unused = 0;
gc->wake_enabled = ~0;
+
gc->chip_types[0].type = IRQ_TYPE_SENSE_MASK;
gc->chip_types[0].chip.irq_eoi = irq_gc_eoi;
gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;
- gc->chip_types[0].chip.irq_shutdown = aic_common_shutdown;
+ gc->chip_types[0].chip.irq_shutdown = aic_irq_shutdown;
gc->chip_types[0].chip.irq_mask = aic_mask;
gc->chip_types[0].chip.irq_unmask = aic_unmask;
gc->chip_types[0].chip.irq_retrigger = aic_retrigger;
gc->chip_types[0].chip.irq_set_type = aic_set_type;
+ gc->chip_types[0].chip.irq_suspend = aic_suspend;
+ gc->chip_types[0].chip.irq_resume = aic_resume;
+ gc->chip_types[0].chip.irq_pm_shutdown = aic_pm_shutdown;
+
gc->private = &aic[i];
}
diff --git a/drivers/irqchip/irq-atmel-aic.c b/drivers/irqchip/irq-atmel-aic.c
index 9166733..5f943b5 100644
--- a/drivers/irqchip/irq-atmel-aic.c
+++ b/drivers/irqchip/irq-atmel-aic.c
@@ -74,42 +74,6 @@ aic_handle(struct pt_regs *regs)
handle_domain_irq(aic_domain, irqnr, regs);
}
-#ifdef CONFIG_PM
-static void aic_suspend(struct irq_data *d)
-{
- struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-
- irq_gc_lock(gc);
- irq_reg_writel(gc, gc->mask_cache, AT91_AIC_IDCR);
- irq_reg_writel(gc, gc->wake_active, AT91_AIC_IECR);
- irq_gc_unlock(gc);
-}
-
-static void aic_resume(struct irq_data *d)
-{
- struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-
- irq_gc_lock(gc);
- irq_reg_writel(gc, gc->wake_active, AT91_AIC_IDCR);
- irq_reg_writel(gc, gc->mask_cache, AT91_AIC_IECR);
- irq_gc_unlock(gc);
-}
-
-static void aic_pm_shutdown(struct irq_data *d)
-{
- struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
-
- irq_gc_lock(gc);
- irq_reg_writel(gc, 0xffffffff, AT91_AIC_IDCR);
- irq_reg_writel(gc, 0xffffffff, AT91_AIC_ICCR);
- irq_gc_unlock(gc);
-}
-#else
-#define aic_suspend NULL
-#define aic_resume NULL
-#define aic_pm_shutdown NULL
-#endif /* CONFIG_PM */
-
static void __init aic_hw_init(struct irq_domain *domain)
{
struct irq_chip_generic *gc = irq_get_domain_generic_chip(domain, 0);
@@ -157,9 +121,6 @@ static int __init aic_of_init(struct device_node *node,
gc = irq_get_domain_generic_chip(domain, 0);
gc->chip_types[0].regs.eoi = AT91_AIC_EOICR;
- gc->chip_types[0].chip.irq_suspend = aic_suspend;
- gc->chip_types[0].chip.irq_resume = aic_resume;
- gc->chip_types[0].chip.irq_pm_shutdown = aic_pm_shutdown;
aic_hw_init(domain);
set_handle_irq(aic_handle);
diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c
index 972eba7..ec89178 100644
--- a/drivers/irqchip/irq-atmel-aic5.c
+++ b/drivers/irqchip/irq-atmel-aic5.c
@@ -83,74 +83,6 @@ aic5_handle(struct pt_regs *regs)
handle_domain_irq(aic5_domain, irqnr, regs);
}
-#ifdef CONFIG_PM
-static void aic5_suspend(struct irq_data *d)
-{
- struct irq_domain *domain = d->domain;
- struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);
- struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
- int i;
- u32 mask;
-
- irq_gc_lock(bgc);
- for (i = 0; i < AIC_IRQS_PER_CHIP; i++) {
- mask = 1 << i;
- if ((mask & gc->mask_cache) == (mask & gc->wake_active))
- continue;
-
- irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);
- if (mask & gc->wake_active)
- irq_reg_writel(bgc, 1, AT91_AIC5_IECR);
- else
- irq_reg_writel(bgc, 1, AT91_AIC5_IDCR);
- }
- irq_gc_unlock(bgc);
-}
-
-static void aic5_resume(struct irq_data *d)
-{
- struct irq_domain *domain = d->domain;
- struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);
- struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
- int i;
- u32 mask;
-
- irq_gc_lock(bgc);
- for (i = 0; i < AIC_IRQS_PER_CHIP; i++) {
- mask = 1 << i;
- if ((mask & gc->mask_cache) == (mask & gc->wake_active))
- continue;
-
- irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);
- if (mask & gc->mask_cache)
- irq_reg_writel(bgc, 1, AT91_AIC5_IECR);
- else
- irq_reg_writel(bgc, 1, AT91_AIC5_IDCR);
- }
- irq_gc_unlock(bgc);
-}
-
-static void aic5_pm_shutdown(struct irq_data *d)
-{
- struct irq_domain *domain = d->domain;
- struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);
- struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
- int i;
-
- irq_gc_lock(bgc);
- for (i = 0; i < AIC_IRQS_PER_CHIP; i++) {
- irq_reg_writel(bgc, i + gc->irq_base, AT91_AIC5_SSR);
- irq_reg_writel(bgc, 1, AT91_AIC5_IDCR);
- irq_reg_writel(bgc, 1, AT91_AIC5_ICCR);
- }
- irq_gc_unlock(bgc);
-}
-#else
-#define aic5_suspend NULL
-#define aic5_resume NULL
-#define aic5_pm_shutdown NULL
-#endif /* CONFIG_PM */
-
static void __init aic5_hw_init(struct irq_domain *domain)
{
struct irq_chip_generic *gc = irq_get_domain_generic_chip(domain, 0);
@@ -207,9 +139,6 @@ static int __init aic5_of_init(struct device_node *node,
gc = irq_get_domain_generic_chip(domain, i * AIC_IRQS_PER_CHIP);
gc->chip_types[0].regs.eoi = AT91_AIC5_EOICR;
- gc->chip_types[0].chip.irq_suspend = aic5_suspend;
- gc->chip_types[0].chip.irq_resume = aic5_resume;
- gc->chip_types[0].chip.irq_pm_shutdown = aic5_pm_shutdown;
}
aic5_hw_init(domain);
--
2.6.4
--
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