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Date: Mon, 4 Jan 2016 13:28:34 +0900
From: Milo Kim <milo.kim@...com>
To: <tglx@...utronix.de>
CC: <jason@...edaemon.net>, <marc.zyngier@....com>,
<alexandre.belloni@...e-electrons.com>,
<boris.brezillon@...e-electrons.com>,
<ludovic.desroches@...el.com>, <nicolas.ferre@...el.com>,
<linux-kernel@...r.kernel.org>, Milo Kim <milo.kim@...com>
Subject: [PATCH 10/19] irqchip: atmel-aic: add common set_type function
set_type() operation updates IRQ flag for selected IRQ.
By using aic_update_smr(), this operation can be unified.
Common set_type() handles interrupt type as below.
1. Set register value corresponding to IRQ type.
2. If SSR is used, write hwirq into SSR for IRQ selection
3. Read value of SMR
4. Update IRQ type into SMR
aic_update_smr() handles step 2, 3 and 4.
Please note that there are two helpers for getting IRQ chip generic data.
One is irq_data_get_irq_chip_data(d) named 'gc'.
The other is irq_get_domain_generic_chip(domain, 0) called 'bgc'.
'gc' is used for getting external IRQ configuration which is specified in
chip private data, 'aic'. Low level IRQ/falling IRQ detection is only
valid for external interrupts. So 'aic->ext_irqs' should be checked.
'bgc' is used for general operations like lock/unlocking IRQ data and
accessing AIC/AIC5 registers.
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Marc Zyngier <marc.zyngier@....com>
Cc: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc: Boris BREZILLON <boris.brezillon@...e-electrons.com>
Cc: Ludovic Desroches <ludovic.desroches@...el.com>
Cc: Nicolas Ferre <nicolas.ferre@...el.com>
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Milo Kim <milo.kim@...com>
---
drivers/irqchip/irq-atmel-aic-common.c | 20 ++++++++++++--------
drivers/irqchip/irq-atmel-aic-common.h | 2 --
drivers/irqchip/irq-atmel-aic.c | 17 -----------------
drivers/irqchip/irq-atmel-aic5.c | 19 -------------------
4 files changed, 12 insertions(+), 46 deletions(-)
diff --git a/drivers/irqchip/irq-atmel-aic-common.c b/drivers/irqchip/irq-atmel-aic-common.c
index ec93725..4c404f9 100644
--- a/drivers/irqchip/irq-atmel-aic-common.c
+++ b/drivers/irqchip/irq-atmel-aic-common.c
@@ -263,37 +263,40 @@ static int aic_retrigger(struct irq_data *d)
return 0;
}
-int aic_common_set_type(struct irq_data *d, unsigned type, unsigned *val)
+static int aic_set_type(struct irq_data *d, unsigned int type)
{
+ struct irq_domain *domain = d->domain;
+ struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);
struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
struct aic_chip_data *aic = gc->private;
- unsigned aic_type;
+ u32 val;
switch (type) {
case IRQ_TYPE_LEVEL_HIGH:
- aic_type = AT91_AIC_SRCTYPE_HIGH;
+ val = AT91_AIC_SRCTYPE_HIGH;
break;
case IRQ_TYPE_EDGE_RISING:
- aic_type = AT91_AIC_SRCTYPE_RISING;
+ val = AT91_AIC_SRCTYPE_RISING;
break;
case IRQ_TYPE_LEVEL_LOW:
if (!(d->mask & aic->ext_irqs))
return -EINVAL;
- aic_type = AT91_AIC_SRCTYPE_LOW;
+ val = AT91_AIC_SRCTYPE_LOW;
break;
case IRQ_TYPE_EDGE_FALLING:
if (!(d->mask & aic->ext_irqs))
return -EINVAL;
- aic_type = AT91_AIC_SRCTYPE_FALLING;
+ val = AT91_AIC_SRCTYPE_FALLING;
break;
default:
return -EINVAL;
}
- *val &= ~AT91_AIC_SRCTYPE;
- *val |= aic_type;
+ irq_gc_lock(bgc);
+ aic_update_smr(bgc, d->hwirq, ~AT91_AIC_SRCTYPE, val);
+ irq_gc_unlock(bgc);
return 0;
}
@@ -376,6 +379,7 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
gc->chip_types[0].chip.irq_mask = aic_mask;
gc->chip_types[0].chip.irq_unmask = aic_unmask;
gc->chip_types[0].chip.irq_retrigger = aic_retrigger;
+ gc->chip_types[0].chip.irq_set_type = aic_set_type;
gc->private = &aic[i];
}
diff --git a/drivers/irqchip/irq-atmel-aic-common.h b/drivers/irqchip/irq-atmel-aic-common.h
index e068349..bf721b8 100644
--- a/drivers/irqchip/irq-atmel-aic-common.h
+++ b/drivers/irqchip/irq-atmel-aic-common.h
@@ -18,8 +18,6 @@
#define AIC_IRQS_PER_CHIP 32
-int aic_common_set_type(struct irq_data *d, unsigned type, unsigned *val);
-
struct irq_domain *__init aic_common_of_init(struct device_node *node,
const char *name, int nirqs);
diff --git a/drivers/irqchip/irq-atmel-aic.c b/drivers/irqchip/irq-atmel-aic.c
index c218716..9166733 100644
--- a/drivers/irqchip/irq-atmel-aic.c
+++ b/drivers/irqchip/irq-atmel-aic.c
@@ -74,22 +74,6 @@ aic_handle(struct pt_regs *regs)
handle_domain_irq(aic_domain, irqnr, regs);
}
-static int aic_set_type(struct irq_data *d, unsigned type)
-{
- struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
- unsigned int smr;
- int ret;
-
- smr = irq_reg_readl(gc, AT91_AIC_SMR(d->hwirq));
- ret = aic_common_set_type(d, type, &smr);
- if (ret)
- return ret;
-
- irq_reg_writel(gc, smr, AT91_AIC_SMR(d->hwirq));
-
- return 0;
-}
-
#ifdef CONFIG_PM
static void aic_suspend(struct irq_data *d)
{
@@ -173,7 +157,6 @@ static int __init aic_of_init(struct device_node *node,
gc = irq_get_domain_generic_chip(domain, 0);
gc->chip_types[0].regs.eoi = AT91_AIC_EOICR;
- gc->chip_types[0].chip.irq_set_type = aic_set_type;
gc->chip_types[0].chip.irq_suspend = aic_suspend;
gc->chip_types[0].chip.irq_resume = aic_resume;
gc->chip_types[0].chip.irq_pm_shutdown = aic_pm_shutdown;
diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c
index 49d40b4..972eba7 100644
--- a/drivers/irqchip/irq-atmel-aic5.c
+++ b/drivers/irqchip/irq-atmel-aic5.c
@@ -83,24 +83,6 @@ aic5_handle(struct pt_regs *regs)
handle_domain_irq(aic5_domain, irqnr, regs);
}
-static int aic5_set_type(struct irq_data *d, unsigned type)
-{
- struct irq_domain *domain = d->domain;
- struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);
- unsigned int smr;
- int ret;
-
- irq_gc_lock(bgc);
- irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR);
- smr = irq_reg_readl(bgc, AT91_AIC5_SMR);
- ret = aic_common_set_type(d, type, &smr);
- if (!ret)
- irq_reg_writel(bgc, smr, AT91_AIC5_SMR);
- irq_gc_unlock(bgc);
-
- return ret;
-}
-
#ifdef CONFIG_PM
static void aic5_suspend(struct irq_data *d)
{
@@ -225,7 +207,6 @@ static int __init aic5_of_init(struct device_node *node,
gc = irq_get_domain_generic_chip(domain, i * AIC_IRQS_PER_CHIP);
gc->chip_types[0].regs.eoi = AT91_AIC5_EOICR;
- gc->chip_types[0].chip.irq_set_type = aic5_set_type;
gc->chip_types[0].chip.irq_suspend = aic5_suspend;
gc->chip_types[0].chip.irq_resume = aic5_resume;
gc->chip_types[0].chip.irq_pm_shutdown = aic5_pm_shutdown;
--
2.6.4
--
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