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Message-ID: <20160106132835.GA20318@rob-hp-laptop>
Date: Wed, 6 Jan 2016 07:28:35 -0600
From: Rob Herring <robh@...nel.org>
To: Kishon Vijay Abraham I <kishon@...com>
Cc: Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>, linux-omap@...r.kernel.org,
linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, rogerq@...com, nsekhar@...com
Subject: Re: [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie
phy
On Wed, Jan 06, 2016 at 04:29:08PM +0530, Kishon Vijay Abraham I wrote:
> DRA72 uses USB3 PHY for the 2nd lane of PCIE. The configuration
> required to make USB3 PHY used for the 2nd lane of PCIe is done
> here.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
> ---
> Documentation/devicetree/bindings/phy/ti-phy.txt | 2 ++
> drivers/phy/phy-ti-pipe3.c | 30 +++++++++++++++++++++-
> 2 files changed, 31 insertions(+), 1 deletion(-)
Acked-by: Rob Herring <robh@...nel.org>
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