[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1452251643-17769-5-git-send-email-anju@linux.vnet.ibm.com>
Date: Fri, 8 Jan 2016 16:44:03 +0530
From: Anju T <anju@...ux.vnet.ibm.com>
To: mpe@...erman.id.au
Cc: khandual@...ux.vnet.ibm.com, maddy@...ux.vnet.ibm.com,
jolsa@...hat.com, dsahern@...il.com, acme@...hat.com,
sukadev@...ux.vnet.ibm.com, hemant@...ux.vnet.ibm.com,
naveen.n.rao@...ux.vnet.ibm.com, anju@...ux.vnet.ibm.com,
linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: [PATCH V1 4/4] tool/perf: Add sample_reg_mask to include all perf_regs regs
From: Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>
Add sample_reg_mask array with pt_regs registers.
This is needed for printing supported regs ( -I? option).
Signed-off-by: Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>
---
tools/perf/arch/powerpc/util/Build | 1 +
tools/perf/arch/powerpc/util/perf_regs.c | 48 ++++++++++++++++++++++++++++++++
2 files changed, 49 insertions(+)
create mode 100644 tools/perf/arch/powerpc/util/perf_regs.c
diff --git a/tools/perf/arch/powerpc/util/Build b/tools/perf/arch/powerpc/util/Build
index 7b8b0d1..3deb1bc 100644
--- a/tools/perf/arch/powerpc/util/Build
+++ b/tools/perf/arch/powerpc/util/Build
@@ -1,5 +1,6 @@
libperf-y += header.o
libperf-y += sym-handling.o
+libperf-y += perf_regs.o
libperf-$(CONFIG_DWARF) += dwarf-regs.o
libperf-$(CONFIG_DWARF) += skip-callchain-idx.o
diff --git a/tools/perf/arch/powerpc/util/perf_regs.c b/tools/perf/arch/powerpc/util/perf_regs.c
new file mode 100644
index 0000000..0b0ec65
--- /dev/null
+++ b/tools/perf/arch/powerpc/util/perf_regs.c
@@ -0,0 +1,48 @@
+#include "../../perf.h"
+#include "../../util/perf_regs.h"
+
+const struct sample_reg sample_reg_masks[] = {
+ SMPL_REG(gpr0, PERF_REG_POWERPC_GPR0),
+ SMPL_REG(gpr1, PERF_REG_POWERPC_GPR1),
+ SMPL_REG(gpr2, PERF_REG_POWERPC_GPR2),
+ SMPL_REG(gpr3, PERF_REG_POWERPC_GPR3),
+ SMPL_REG(gpr4, PERF_REG_POWERPC_GPR4),
+ SMPL_REG(gpr5, PERF_REG_POWERPC_GPR5),
+ SMPL_REG(gpr6, PERF_REG_POWERPC_GPR6),
+ SMPL_REG(gpr7, PERF_REG_POWERPC_GPR7),
+ SMPL_REG(gpr8, PERF_REG_POWERPC_GPR8),
+ SMPL_REG(gpr9, PERF_REG_POWERPC_GPR9),
+ SMPL_REG(gpr10, PERF_REG_POWERPC_GPR10),
+ SMPL_REG(gpr11, PERF_REG_POWERPC_GPR11),
+ SMPL_REG(gpr12, PERF_REG_POWERPC_GPR12),
+ SMPL_REG(gpr13, PERF_REG_POWERPC_GPR13),
+ SMPL_REG(gpr14, PERF_REG_POWERPC_GPR14),
+ SMPL_REG(gpr15, PERF_REG_POWERPC_GPR15),
+ SMPL_REG(gpr16, PERF_REG_POWERPC_GPR16),
+ SMPL_REG(gpr17, PERF_REG_POWERPC_GPR17),
+ SMPL_REG(gpr18, PERF_REG_POWERPC_GPR18),
+ SMPL_REG(gpr19, PERF_REG_POWERPC_GPR19),
+ SMPL_REG(gpr20, PERF_REG_POWERPC_GPR20),
+ SMPL_REG(gpr21, PERF_REG_POWERPC_GPR21),
+ SMPL_REG(gpr22, PERF_REG_POWERPC_GPR22),
+ SMPL_REG(gpr23, PERF_REG_POWERPC_GPR23),
+ SMPL_REG(gpr24, PERF_REG_POWERPC_GPR24),
+ SMPL_REG(gpr25, PERF_REG_POWERPC_GPR25),
+ SMPL_REG(gpr26, PERF_REG_POWERPC_GPR26),
+ SMPL_REG(gpr27, PERF_REG_POWERPC_GPR27),
+ SMPL_REG(gpr28, PERF_REG_POWERPC_GPR28),
+ SMPL_REG(gpr29, PERF_REG_POWERPC_GPR29),
+ SMPL_REG(gpr30, PERF_REG_POWERPC_GPR30),
+ SMPL_REG(gpr31, PERF_REG_POWERPC_GPR31),
+ SMPL_REG(nip, PERF_REG_POWERPC_NIP),
+ SMPL_REG(msr, PERF_REG_POWERPC_MSR),
+ SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),
+ SMPL_REG(ctr, PERF_REG_POWERPC_CTR),
+ SMPL_REG(link, PERF_REG_POWERPC_LNK),
+ SMPL_REG(xer, PERF_REG_POWERPC_XER),
+ SMPL_REG(ccr, PERF_REG_POWERPC_CCR),
+ SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
+ SMPL_REG(dar, PERF_REG_POWERPC_DAR),
+ SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
+ SMPL_REG_END
+};
--
2.1.0
Powered by blists - more mailing lists