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Message-ID: <1452278231-9546-1-git-send-email-rklein@nvidia.com> Date: Fri, 8 Jan 2016 13:37:02 -0500 From: Rhyland Klein <rklein@...dia.com> To: Peter De Schrijver <pdeschrijver@...dia.com> CC: Mike Turquette <mturquette@...aro.org>, Stephen Warren <swarren@...dotorg.org>, Stephen Boyd <sboyd@...eaurora.org>, Thierry Reding <thierry.reding@...il.com>, Alexandre Courbot <gnurou@...il.com>, Bill Huang <bilhuang@...dia.com>, Jim Lin <jilin@...dia.com>, Benson Leung <bleung@...omium.org>, linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org, Rhyland Klein <rklein@...dia.com> Subject: [PATCH 0/9 REPOST] Tegra CLK Fixes This patch set fixes some issues found with the Tegra CLK drivers in testing. There are also a few patches which clean up the code and fix some naming issues. Andrew Bresticker (1): clk: tegra: pll: Fix potential sleeping-while-atomic Mark Kuo (2): clk: tegra: pll: Do not disable PLLE when under HW control clk: tegra: pll: Fix PLLE SS config Rhyland Klein (6): clk: tegra: Fix divider on VI_I2C clk: tegra210: Remove improper flags for lock_enable clk: tegra210: Fix naming of MISC registers clk: tegra: Fix the misnaming of nvenc from msenc clk: tegra210: fix pllx dyn step calculation clk: tegra210: Initialize PLL_D2 to a sane rate drivers/clk/tegra/clk-pll.c | 50 +++++++++++++-------- drivers/clk/tegra/clk-tegra-periph.c | 4 +- drivers/clk/tegra/clk-tegra210.c | 87 +++++++++++++++--------------------- 3 files changed, 71 insertions(+), 70 deletions(-) -- 1.9.1
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