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Message-ID: <20160108210222.GA19019@rob-hp-laptop>
Date: Fri, 8 Jan 2016 15:02:22 -0600
From: Rob Herring <robh@...nel.org>
To: Zhao Qiang <qiang.zhao@....com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linuxppc-dev@...ts.ozlabs.org, Priyanka.Jain@...escale.com,
oss@...error.net
Subject: Re: [PATCH 1/6] QE: Add IC, SI and SIRAM document to device tree
bindings.
On Fri, Jan 08, 2016 at 10:18:09AM +0800, Zhao Qiang wrote:
> Add IC, SI and SIRAM document of QE to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
>
> Signed-off-by: Zhao Qiang <qiang.zhao@....com>
> ---
> .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt | 53 ++++++++++++++++++++++
> 1 file changed, 53 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> index 4f89302..5e00fc8 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> @@ -69,6 +69,59 @@ Example:
> };
> };
>
> +* Interrupt Controller (IC)
> +
> +Required properties:
> +- compatible : should be "fsl,qe-ic".
> +- reg : Address range of IC register set.
> +- interrupts : interrupts generated by the device.
Add interrupt-controller, too.
> +
> +Example:
> +
> + qeic: interrupt-controller@80 {
> + interrupt-controller;
> + compatible = "fsl,qe-ic";
> + #address-cells = <0>;
> + #interrupt-cells = <1>;
> + reg = <0x80 0x80>;
> + interrupts = <95 2 0 0 94 2 0 0>; //high:79 low:78
> + };
> +
> +* Serial Interface Block (SI)
> +
> +The SI manages the routing of eight TDM lines to the QE block serial drivers
> +, the MCC and the UCCs, for receive and transmit.
> +
> +Required properties:
> +- compatible : should be "fsl,qe-si".
> +- reg : Address range of SI register set.
> +
> +Example:
> +
> + si1: si@700 {
> + #address-cells = <1>;
> + #size-cells = <0>;
Why are these needed? There are no child nodes.
> + compatible = "fsl,qe-si";
> + reg = <0x700 0x80>;
> + };
> +
> +* Serial Interface Block RAM(SIRAM)
> +
> +store the routing entries of SI
> +
> +Required properties:
> +- compatible : should be "fsl,qe-siram".
> +- reg : Address range of SI RAM.
> +
> +Example:
> +
> + siram1: siram@...0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
ditto.
> + compatible = "fsl,qe-siram";
> + reg = <0x1000 0x800>;
> + };
> +
> * QE Firmware Node
>
> This node defines a firmware binary that is embedded in the device tree, for
> --
> 2.1.0.27.g96db324
>
> --
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