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Message-ID: <20160109044130.GA20052@hector.attlocal.net>
Date:	Fri, 8 Jan 2016 22:41:30 -0600
From:	Andy Gross <andy.gross@...aro.org>
To:	Stephen Boyd <sboyd@...eaurora.org>
Cc:	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: Add L2 cache node to msm8916

On Fri, Jan 08, 2016 at 03:57:09PM -0800, Stephen Boyd wrote:
> The msm8916 SoC has an L2 cache for all 4 CPUs. Add it to the
> dtsi file so that the cache hierarchy can be probed.
> 
> Cc: <devicetree@...r.kernel.org>
> Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
> ---

Reviewed-by: Andy Gross <andy.gross@...aro.org>

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