lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Mon, 11 Jan 2016 15:22:28 +0000
From:	Måns Rullgård <mans@...sr.com>
To:	Andy Shevchenko <andy.shevchenko@...il.com>
Cc:	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	Viresh Kumar <vireshk@...nel.org>,
	Dan Williams <dan.j.williams@...el.com>,
	Vinod Koul <vinod.koul@...el.com>,
	dmaengine <dmaengine@...r.kernel.org>,
	"linux-kernel\@vger.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 2/2] dmaengine: dw: fix cyclic transfer callbacks

Andy Shevchenko <andy.shevchenko@...il.com> writes:

> On Mon, Jan 11, 2016 at 5:09 PM, Måns Rullgård <mans@...sr.com> wrote:
>> Andy Shevchenko <andriy.shevchenko@...ux.intel.com> writes:
>>
>>> On Mon, 2016-01-11 at 13:04 +0000, Mans Rullgard wrote:
>>>> Cyclic transfer callbacks rely on block completion interrupts which
>>>> were
>>>> disabled in commit ff7b05f29fd4 ("dmaengine/dw_dmac: Don't handle
>>>> block
>>>> interrupts").  This re-enables block interrupts so the cyclic
>>>> callbacks
>>>> can work.  Other transfer types are not affected as they set the
>>>> INT_EN
>>>> bit only on the last block.
>>>>
>>>> Fixes: ff7b05f29fd4 ("dmaengine/dw_dmac: Don't handle block
>>>> interrupts")
>>>> Signed-off-by: Mans Rullgard <mans@...sr.com>
>>>
>>> How did you test that?
>>
>> With the ABDAC sound driver on the AVR32.  It fails rather miserably
>> without these patches.
>>
>>> From my understanding the custom stuff that does cyclic interrupts
>>> prepares a set of descriptors per period, which at the end of transfer
>>> will generate XFER interrupt. Next period will go in the same way.
>>>
>>> Maybe I missed something.
>>
>> The cyclic DMA is done by setting up a set of descriptors, one per
>> period, with the last linked back to the first.  The chain never ends,
>> so there is never an XFER interrupt.
>
> Thanks for clarification.
>
> Nevertheless, my plan is to get rid of custom implementation of the
> cyclic API in this driver,

Good idea.

> thus, I would suggest to have this patch only for stable and as
> interim for mainline.

Better to start from a working state.

-- 
Måns Rullgård

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ