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Date: Wed, 13 Jan 2016 00:10:19 +0200 From: "Michael S. Tsirkin" <mst@...hat.com> To: linux-kernel@...r.kernel.org, Linus Torvalds <torvalds@...ux-foundation.org> Cc: Davidlohr Bueso <dave@...olabs.net>, Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>, the arch/x86 maintainers <x86@...nel.org>, Davidlohr Bueso <dbueso@...e.de>, "H. Peter Anvin" <hpa@...or.com>, virtualization <virtualization@...ts.linux-foundation.org>, Ingo Molnar <mingo@...hat.com>, Andy Lutomirski <luto@...nel.org>, Andrey Konovalov <andreyknvl@...gle.com>, Borislav Petkov <bp@...e.de> Subject: [PATCH v2 2/3] x86: drop a comment left over from X86_OOSTORE The comment about wmb being non-nop is a left over from before commit 09df7c4c8097 ("x86: Remove CONFIG_X86_OOSTORE"). It makes no sense now: if you have an SMP system with out of order stores, making wmb not a nop will not help. Additionally, wmb is not a nop even for regular intel CPUs because of weird use-cases e.g. dealing with WC memory. Drop this comment. Signed-off-by: Michael S. Tsirkin <mst@...hat.com> --- arch/x86/include/asm/barrier.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h index 7f99726..eb220b8 100644 --- a/arch/x86/include/asm/barrier.h +++ b/arch/x86/include/asm/barrier.h @@ -11,11 +11,6 @@ */ #ifdef CONFIG_X86_32 -/* - * Some non-Intel clones support out of order store. wmb() ceases to be a - * nop for these. - */ - #define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory") #define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2) #define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM) -- MST
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