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Message-ID: <1452582683.7773.102.camel@perches.com>
Date: Mon, 11 Jan 2016 23:11:23 -0800
From: Joe Perches <joe@...ches.com>
To: Andi Shyti <andi.shyti@...sung.com>,
linux-arm-kernel@...ts.infradead.org
Cc: linux@....linux.org.uk, tony@...mide.com, robh@...nel.org,
tglx@...utronix.de, olof@...om.net, tomasz.figa@...il.com,
jiang.liu@...ux.intel.com, yamada.masahiro@...ionext.com,
linux-kernel@...r.kernel.org, k.kozlowski@...sung.com,
m.szyprowski@...sung.com, andi@...zian.org
Subject: Re: [PATCH] arm: irq: l2c: do not print error in case of missing
l2c from dtb
On Tue, 2016-01-12 at 15:34 +0900, Andi Shyti wrote:
> In some architectures the L2 cache controller is integrated in the
> processor's block itself and it doesn't use any external cache
> controller. This means that an entry in the board's dtb related
> to the l2c is not necessary.
>
> Distinguish between error codes and print just an information in
> case of -ENODEV.
trivia:
> diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
[]
> @@ -95,7 +95,9 @@ void __init init_IRQ(void)
> outer_cache.write_sec = machine_desc->l2c_write_sec;
> ret = l2x0_of_init(machine_desc->l2c_aux_val,
> machine_desc->l2c_aux_mask);
> - if (ret)
> + if (ret == -ENODEV)
> + pr_info("no L2C controller entry found in the dtb\n");
Perhaps this would be more consistent if it was
pr_info("L2C: no controller entry found in the dtb\n");
>
> + else if (ret)
> pr_err("L2C: failed to init: %d\n", ret);
> }
>
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