lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Tue, 12 Jan 2016 19:33:47 +0800
From:	Andy Yan <andy.yan@...k-chips.com>
To:	heiko@...ech.de, arnd@...db.de, john.stultz@...aro.org
Cc:	linux@...ck-us.net, galak@...eaurora.org,
	ijc+devicetree@...lion.org.uk, robh+dt@...nel.org,
	catalin.marinas@....com, geert+renesas@...der.be, sre@...nel.org,
	olof@...om.net, dbaryshkov@...il.com,
	alexandre.belloni@...e-electrons.com, jun.nie@...aro.org,
	pawel.moll@....com, f.fainelli@...il.com, will.deacon@....com,
	linux-rockchip@...ts.infradead.org, devicetree@...r.kernel.org,
	linux-pm@...r.kernel.org, linux@....linux.org.uk,
	linux-arm-kernel@...ts.infradead.org, lorenzo.pieralisi@....com,
	moritz.fischer@...us.com, cernekee@...il.com,
	linux-kernel@...r.kernel.org, dwmw2@...radead.org,
	mark.rutland@....com, maxime.ripard@...e-electrons.com,
	Andy Yan <andy.yan@...k-chips.com>
Subject: [PATCH v2 4/4] ARM64: dts: rockchip: add syscon-reboot-mode DT node

Add syscon-reboot-mode driver DT node for rk3368 platform

Signed-off-by: Andy Yan <andy.yan@...k-chips.com>

---

Changes in v2:
- make this node as a subnode of pmugrf

Changes in v1: None

 arch/arm64/boot/dts/rockchip/rk3368.dtsi | 33 +++++++++++++++++++++++++++++++-
 1 file changed, 32 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index cc093a4..20997a2 100644
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -45,6 +45,7 @@
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip_boot-mode.h>
 
 / {
 	compatible = "rockchip,rk3368";
@@ -485,8 +486,38 @@
 	};
 
 	pmugrf: syscon@...38000 {
-		compatible = "rockchip,rk3368-pmugrf", "syscon";
+		compatible = "rockchip,rk3368-pmugrf", "syscon", "simple-mfd";
 		reg = <0x0 0xff738000 0x0 0x1000>;
+
+		reboot-mode {
+			compatible = "syscon-reboot-mode";
+			offset = <0x200>;
+
+			normal {
+				linux,mode = "normal";
+				loader,magic = <BOOT_NORMAL>;
+			};
+
+			loader {
+				linux,mode = "loader";
+				loader,magic = <BOOT_LOADER>;
+			};
+
+			maskrom {
+				linux,mode = "maskrom";
+				loader,magic = <BOOT_MASKROM>;
+			};
+
+			recovery {
+				linux,mode = "recovery";
+				loader,magic = <BOOT_RECOVERY>;
+			};
+
+			fastboot {
+				linux,mode = "fastboot";
+				loader,magic = <BOOT_FASTBOOT>;
+			};
+		};
 	};
 
 	cru: clock-controller@...60000 {
-- 
1.9.1


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ