linux-kernel - Re: [dm-devel] [PATCH v2 0/2] Introduce the bulk IV mode for improving the crypto engine efficiency

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Message-ID: <20160114113527.GR6588@sirena.org.uk>
Date:	Thu, 14 Jan 2016 11:35:27 +0000
From:	Mark Brown <broonie@...nel.org>
To:	Mikulas Patocka <mpatocka@...hat.com>
Cc:	device-mapper development <dm-devel@...hat.com>,
	Milan Broz <gmazyland@...il.com>, Jens Axboe <axboe@...nel.dk>,
	keith.busch@...el.com, linux-raid@...r.kernel.org,
	martin.petersen@...cle.com, Mike Snitzer <snitzer@...hat.com>,
	Baolin Wang <baolin.wang@...aro.org>,
	linux-block@...r.kernel.org, neilb@...e.com,
	LKML <linux-kernel@...r.kernel.org>, sagig@...lanox.com,
	Arnd Bergmann <arnd@...db.de>, tj@...nel.org,
	dan.j.williams@...el.com,
	Kent Overstreet <kent.overstreet@...il.com>,
	Alasdair G Kergon <agk@...hat.com>
Subject: Re: [dm-devel] [PATCH v2 0/2] Introduce the bulk IV mode for
 improving the crypto engine efficiency

On Tue, Jan 12, 2016 at 09:13:19PM -0500, Mikulas Patocka wrote:
> On Tue, 12 Jan 2016, Mark Brown wrote:

> > This isn't targeted at a specific driver or system, it's trying to make
> > dm-crypt better able to make use of hardware acceleration in general.

> If the hardware acceleration doesn't allow to set arbitrary XTS tweak, 
> then this "large block" optimization on XTS can't be done at all.

> So, we need to know which driver(s) you want to optimize for and how do 
> those driver(s) handle tweak generation.

Unfortunately the reality is just as I described it - we're looking for
general improvements, not at specific devices (well, Linaro is mainly
interested in ARM based SoCs but the range of ARM SoCs is such that that
that doesn't really narrow things down).  It's probably better to ask if
there exists any hardware which could use this usefully, software only
implementations (or hardware that only does AES) at least give us
control over supplying the tweak.

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