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Message-ID: <alpine.DEB.2.02.1601211114160.8804@linuxheads99>
Date:	Thu, 21 Jan 2016 11:21:08 -0600
From:	atull <atull@...nsource.altera.com>
To:	Moritz Fischer <moritz.fischer@...us.com>
CC:	Rob Herring <robh+dt@...nel.org>, Josh Cartwright <joshc@...com>,
	Greg KH <gregkh@...uxfoundation.org>,
	Michal Simek <monstr@...str.eu>,
	Michal Simek <michal.simek@...inx.com>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	"Kumar Gala" <galak@...eaurora.org>,
	Jonathan Corbet <corbet@....net>,
	"Linux Kernel Mailing List" <linux-kernel@...r.kernel.org>,
	Devicetree List <devicetree@...r.kernel.org>,
	<linux-doc@...r.kernel.org>,
	Pantelis Antoniou <pantelis.antoniou@...sulko.com>,
	Alan Tull <delicious.quinoa@...il.com>,
	"dinguyen@...nsource.altera.com" <dinguyen@...nsource.altera.com>
Subject: Re: [PATCH v15 1/6] fpga: add bindings document for fpga area and
 fpga bus

On Thu, 21 Jan 2016, Moritz Fischer wrote:

> Hi Alan,
> 
> I tried getting a simple example to work with overlays, however so far
> I failed getting
> the child nodes to probe drivers, maybe you have an idea? The fpga
> image is loaded just fine.
> 
> in dts:
> 
>                fpga_bus@0 {
>                        compatible = "altr,fpga-bus", "simple-bus";
>                        #address-cells = <1>;
>                        #size-cells = <1>;
>                        ranges;
> 
>                        fpga_mgr0: devcfg@...07000 {
>                                compatible = "xlnx,zynq-devcfg-1.0",
> "simple-bus";
>                                reg = <0xf8007000 0x100>;
>                                interrupt-parent = <&intc>;
>                                interrupts = <0 8 4>;
>                                clocks = <&clkc 12>;
>                                clock-names = "ref_clk";
>                                syscon = <&slcr>;
> 
>                                #address-cells = <1>;
>                                #size-cells = <1>;
>                                ranges;
>                        };
>               };
> 
> overlay:
> 
> fragment@0 {
>         target-path = "/amba/devcfg@...07000";

Hi Moritz,

          target-path = "/amba/fpga_bus@...evcfg@...07000";

should work, I hope.  If it doesn't, turn on debugging for
fpga-area.c and maybe add more printk's in the probe function.
Hopefully you get to the fpga-area's probe function and can
see which step is bailing out.  If you get as far as 
of_platform_populate, but your axidma's probe isn't getting
called then you could add some debug to drivers/of/platform.c
to see why it's not getting populated.

Alan

>         __overlay__ {
>                 #address-cells = <1>;
>                 #size-cells = <1>;
> 
>                 area@0 {
>                         compatible = "fpga-area";
>                         #address-cells = <1>;
>                         #size-cells = <1>;
>                         ranges;
> 
>                         firmware-name = "dmac.bin";
> 
>                         axi_dma0: axidma@...00000 {
>                                 compatible = "xlnx,axi-dma-1.00.a";
>                                 reg = <0x40000000 0x10000>;
>                                #dma-cells = <1>;
>                                xlnx,include-sg = <1>;
>                                xlnx,include-dre = <1>;
>                               status = "okay";
>                               [...]
>                        };
>                 };
>         };
> };
> 
> 
> I also stumbled across those while looking through the examples:
> 
> > +Example:
> > +
> > +/dts-v1/;
> > +/plugin/;
> 
> /dts-v1/ / plugin/; the above syntax is deprecated:
> 
> Warning (deprecated_plugin_syntax): Use '/dts-v1/ /plugin/'; syntax.
> /dts-v1/; /plugin/; is going to be removed in next versions
> 
> > +Device Tree Example: Partial Reconfiguration with no Bridges
> > +============================================================
> > +
> > +Live Device Tree contains:
> > +       fpgamgr@...03000 {
> > +               compatible = "altr,socfpga-a10-fpga-mgr", "simple-bus";
> > +               clocks = <&l4_mp_clk>;
> > +               resets = <&rst FPGAMGR_RESET>;
> > +               reset-names = "fpgamgr";
> > +               reg = <0xffd03000 0x1000
> > +                      0xffcfe400 0x1000>;
> > +
> > +               #address-cells = <0x1>;
> > +               #size-cells = <0x1>;
> > +               ranges;
> > +       };
> > +
> > +DT Overlay contains:
> > +/dts-v1/;
> > +/plugin/;

Yes, thanks! I will adjust the documentation to reflect that.

Alan

> 
> see above
> 
> Cheers,
> 
> Moritz
> 

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