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Date:	Fri, 22 Jan 2016 12:45:43 -0800
From:	Joe Perches <joe@...ches.com>
To:	Shraddha Barke <shraddha.6596@...il.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Dan Carpenter <dan.carpenter@...cle.com>,
	linux-kernel@...r.kernel.org
Cc:	Peter Senna Tschudin <peter.senna@...il.com>,
	Julia Lawall <julia.lawall@...6.fr>
Subject: Re: [PATCH v2] Platform: goldfish: goldfish_pipe.c: Add DMA support
 using managed version

On Sat, 2016-01-23 at 02:08 +0530, Shraddha Barke wrote:
> setup_access_params_addr has 2 goals-
> 
> -Initialize the access_params field so that it can be used to send and read
> commands from the device in access_with_param
> -Get a bus address for the allocated memory to transfer to the device.
> 
> Replace the combination of devm_kzalloc and _pa() with dmam_alloc_coherent.
> Coherent mapping guarantees that the device and CPU are in sync.
[]
> diff --git a/drivers/platform/goldfish/goldfish_pipe.c b/drivers/platform/goldfish/goldfish_pipe.c
[]
> @@ -217,17 +218,17 @@ static int valid_batchbuffer_addr(struct goldfish_pipe_dev *dev,
[]
> -	/* FIXME */
> -	paddr = __pa(aps);
> -	writel((u32)(paddr >> 32), dev->base + PIPE_REG_PARAMS_ADDR_HIGH);
> -	writel((u32)paddr, dev->base + PIPE_REG_PARAMS_ADDR_LOW);
> +	writel(upper_32_bits(dma_handle), dev->base +
> +	       PIPE_REG_PARAMS_ADDR_HIGH);
> +	writel(lower_32_bits(dma_handle), dev->base + PIPE_REG_PARAMS_ADDR_LOW);

If you were going for style points, it would have been
nicer to use the same style for each writel

	writel(upper_32_bits(dma_handle),
	       dev->base + PIPE_REG_PARAMS_ADDR_HIGH);
	writel(lower_32_bits(dma_handle),
	       dev->base +
PIPE_REG_PARAMS_ADDR_LOW);

or just ignore 80 column limits and use single lines.

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