linux-kernel - Re: [PATCH v8 4/7] mtd: nand: gpmi: may use minimum required ecc for 744 oobsize NAND

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Message-ID: <20160123225646.GH24744@localhost>
Date:	Sat, 23 Jan 2016 14:56:46 -0800
From:	Brian Norris <computersforpeace@...il.com>
To:	Han Xu <b45815@...escale.com>
Cc:	shijie.huang@....com, dwmw2@...radead.org,
	boris.brezillon@...e-electrons.com, fabio.estevam@...escale.com,
	hofrat@...dl.org, linux-mtd@...ts.infradead.org,
	linux-kernel@...r.kernel.org, vinod.koul@...el.com,
	dan.j.williams@...el.com, dmaengine@...r.kernel.org
Subject: Re: [PATCH v8 4/7] mtd: nand: gpmi: may use minimum required ecc for
 744 oobsize NAND

On Wed, Dec 02, 2015 at 04:47:43PM -0600, Han Xu wrote:
> By default NAND driver will choose the highest ecc strength that oob
> could contain, in this case, for some 8K+744 NAND flash, the ecc
> strength will be up to 52bit, which beyonds the i.MX6QDL BCH capability
> (40bit).
> 
> This patch allows the NAND driver try to use minimum required ecc
> strength if it failed to use the highest ecc, even without explicitly
> claiming "fsl,use-minimum-ecc" in dts.
> 
> Signed-off-by: Han Xu <b45815@...escale.com>

Pushed this one to l2-mtd.git/next too.

Would it help to implement support for the "nand-ecc-step-size" and
"nand-ecc-strength" properties sometime? That would be more
maintainable, as it's more specific. What if you need a little stronger
than the minimum ECC? You also are relying on not changing the default
behavior of the driver, for the "legacy" ECC calculation still. That
ties your hands a bit.

Brian