linux-kernel - [PATCH 05/15] dmaengine: dw: set LMS field in descriptors

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Message-Id: <1453663322-14474-6-git-send-email-mans@mansr.com>
Date:	Sun, 24 Jan 2016 19:21:52 +0000
From:	Mans Rullgard <mans@...sr.com>
To:	Viresh Kumar <vireshk@...nel.org>,
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	Vinod Koul <vinod.koul@...el.com>,
	linux-kernel@...r.kernel.org, dmaengine@...r.kernel.org
Cc:	Dan Williams <dan.j.williams@...el.com>
Subject: [PATCH 05/15] dmaengine: dw: set LMS field in descriptors

The LMS field indicates from which master the descriptor is to be
read.  This patch assumes this is always the same as the memory
side in a peripheral transfer which is true for all known systems.

Signed-off-by: Mans Rullgard <mans@...sr.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
---
 drivers/dma/dw/core.c | 19 +++++++++----------
 drivers/dma/dw/regs.h |  4 ++++
 2 files changed, 13 insertions(+), 10 deletions(-)

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 1e29efad2bf1..bbae43451529 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -265,7 +265,7 @@ static void dwc_dostart(struct dw_dma_chan *dwc, struct dw_desc *first)
 
 	dwc_initialize(dwc);
 
-	channel_writel(dwc, LLP, first->txd.phys);
+	channel_writel(dwc, LLP, first->txd.phys | DWC_LLP_LMS(dwc->m_master));
 	channel_writel(dwc, CTL_LO,
 			DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN);
 	channel_writel(dwc, CTL_HI, 0);
@@ -431,7 +431,7 @@ static void dwc_scan_descriptors(struct dw_dma *dw, struct dw_dma_chan *dwc)
 		dwc->residue = desc->total_len;
 
 		/* Check first descriptors addr */
-		if (desc->txd.phys == llp) {
+		if (desc->txd.phys == DWC_LLP_LOC(llp)) {
 			spin_unlock_irqrestore(&dwc->lock, flags);
 			return;
 		}
@@ -756,7 +756,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
 		if (!first) {
 			first = desc;
 		} else {
-			lli_write(prev, llp, desc->txd.phys);
+			lli_write(prev, llp, desc->txd.phys | DWC_LLP_LMS(dwc->m_master));
 			list_add_tail(&desc->desc_node, &first->tx_list);
 		}
 		prev = desc;
@@ -853,7 +853,7 @@ slave_sg_todev_fill_desc:
 			if (!first) {
 				first = desc;
 			} else {
-				lli_write(prev, llp, desc->txd.phys);
+				lli_write(prev, llp, desc->txd.phys | DWC_LLP_LMS(dwc->m_master));
 				list_add_tail(&desc->desc_node, &first->tx_list);
 			}
 			prev = desc;
@@ -908,7 +908,7 @@ slave_sg_fromdev_fill_desc:
 			if (!first) {
 				first = desc;
 			} else {
-				lli_write(prev, llp, desc->txd.phys);
+				lli_write(prev, llp, desc->txd.phys | DWC_LLP_LMS(dwc->m_master));
 				list_add_tail(&desc->desc_node, &first->tx_list);
 			}
 			prev = desc;
@@ -1427,13 +1427,13 @@ struct dw_cyclic_desc *dw_dma_cyclic_prep(struct dma_chan *chan,
 		cdesc->desc[i] = desc;
 
 		if (last)
-			lli_write(last, llp, desc->txd.phys);
+			lli_write(last, llp, desc->txd.phys | DWC_LLP_LMS(dwc->m_master));
 
 		last = desc;
 	}
 
 	/* Let's make a cyclic list */
-	lli_write(last, llp, cdesc->desc[0]->txd.phys);
+	lli_write(last, llp, cdesc->desc[0]->txd.phys | DWC_LLP_LMS(dwc->m_master));
 
 	dev_dbg(chan2dev(&dwc->chan),
 			"cyclic prepared buf %pad len %zu period %zu periods %d\n",
@@ -1635,9 +1635,8 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata)
 			dwc->block_size = pdata->block_size;
 
 			/* Check if channel supports multi block transfer */
-			channel_writel(dwc, LLP, 0xfffffffc);
-			dwc->nollp =
-				(channel_readl(dwc, LLP) & 0xfffffffc) == 0;
+			channel_writel(dwc, LLP, 0xffffffff);
+			dwc->nollp = DWC_LLP_LOC(channel_readl(dwc, LLP)) == 0;
 			channel_writel(dwc, LLP, 0);
 		}
 	}
diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h
index 0391f8ff6919..4e6ec2d75863 100644
--- a/drivers/dma/dw/regs.h
+++ b/drivers/dma/dw/regs.h
@@ -143,6 +143,10 @@ enum dw_dma_msize {
 	DW_DMA_MSIZE_256,
 };
 
+/* Bitfields in LLP */
+#define DWC_LLP_LMS(x)		((x) & 3)	/* list master select */
+#define DWC_LLP_LOC(x)		((x) & ~3)	/* next lli */
+
 /* Bitfields in CTL_LO */
 #define DWC_CTLL_INT_EN		(1 << 0)	/* irqs enabled? */
 #define DWC_CTLL_DST_WIDTH(n)	((n)<<1)	/* bytes per element */
-- 
2.7.0