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Message-ID: <20160125124912.GN20452@ulmo.nvidia.com>
Date:	Mon, 25 Jan 2016 13:49:12 +0100
From:	Thierry Reding <thierry.reding@...il.com>
To:	Rhyland Klein <rklein@...dia.com>
Cc:	Peter De Schrijver <pdeschrijver@...dia.com>,
	Mike Turquette <mturquette@...libre.com>,
	Stephen Warren <swarren@...dotorg.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Alexandre Courbot <gnurou@...il.com>,
	linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
	linux-kernel@...r.kernel.org, Mark Kuo <mkuo@...dia.com>
Subject: Re: [Patch V2 9/9] clk: tegra: pll: Fix PLLE SS coefficients val

On Thu, Jan 14, 2016 at 02:26:42PM -0500, Rhyland Klein wrote:
> From: Mark Kuo <mkuo@...dia.com>
> 
> The PLLE_SS_COEFFICIENTS_VAL should be different for Tegra210
> from Tegra114. Add SoC generation specific versions for Tegra114
> and Tegra210 and use those in their respective plle_enable functions.
> 
> Signed-off-by: Mark Kuo <mkuo@...dia.com>
> Signed-off-by: Rhyland Klein <rklein@...dia.com>
> ---
>  drivers/clk/tegra/clk-pll.c | 18 ++++++++++++------
>  1 file changed, 12 insertions(+), 6 deletions(-)

Applied, thanks.

Thierry

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