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Date: Tue, 26 Jan 2016 11:51:04 -0800 From: "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com> To: Boqun Feng <boqun.feng@...il.com> Cc: Herbert Xu <herbert@...dor.apana.org.au>, Leonid.Yegoshin@...tec.com, linux-mips@...ux-mips.org, linux-ia64@...r.kernel.org, mst@...hat.com, peterz@...radead.org, will.deacon@....com, virtualization@...ts.linux-foundation.org, hpa@...or.com, sparclinux@...r.kernel.org, mingo@...nel.org, linux-arch@...r.kernel.org, linux-s390@...r.kernel.org, linux@....linux.org.uk, user-mode-linux-devel@...ts.sourceforge.net, linux-sh@...r.kernel.org, mpe@...erman.id.au, x86@...nel.org, xen-devel@...ts.xenproject.org, mingo@...e.hu, linux-xtensa@...ux-xtensa.org, james.hogan@...tec.com, arnd@...db.de, stefano.stabellini@...citrix.com, adi-buildroot-devel@...ts.sourceforge.net, ddaney.cavm@...il.com, tglx@...utronix.de, linux-metag@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, andrew.cooper3@...rix.com, linux-kernel@...r.kernel.org, ralf@...ux-mips.org, joe@...ches.com, linuxppc-dev@...ts.ozlabs.org, davem@...emloft.net, Linus Torvalds <torvalds@...ux-foundation.org> Subject: Re: [v3,11/41] mips: reuse asm-generic/barrier.h On Wed, Jan 27, 2016 at 12:52:07AM +0800, Boqun Feng wrote: > Hi Paul, > > On Mon, Jan 18, 2016 at 07:46:29AM -0800, Paul E. McKenney wrote: > > On Mon, Jan 18, 2016 at 04:19:29PM +0800, Herbert Xu wrote: > > > Paul E. McKenney <paulmck@...ux.vnet.ibm.com> wrote: > > > > > > > > You could use SYNC_ACQUIRE() to implement read_barrier_depends() and > > > > smp_read_barrier_depends(), but SYNC_RMB probably does not suffice. > > > > The reason for this is that smp_read_barrier_depends() must order the > > > > pointer load against any subsequent read or write through a dereference > > > > of that pointer. For example: > > > > > > > > p = READ_ONCE(gp); > > > > smp_rmb(); > > > > r1 = p->a; /* ordered by smp_rmb(). */ > > > > p->b = 42; /* NOT ordered by smp_rmb(), BUG!!! */ > > > > r2 = x; /* ordered by smp_rmb(), but doesn't need to be. */ > > > > > > > > In contrast: > > > > > > > > p = READ_ONCE(gp); > > > > smp_read_barrier_depends(); > > > > r1 = p->a; /* ordered by smp_read_barrier_depends(). */ > > > > p->b = 42; /* ordered by smp_read_barrier_depends(). */ > > > > r2 = x; /* not ordered by smp_read_barrier_depends(), which is OK. */ > > > > > > > > Again, if your hardware maintains local ordering for address > > > > and data dependencies, you can have read_barrier_depends() and > > > > smp_read_barrier_depends() be no-ops like they are for most > > > > architectures. > > > > > > > > Does that help? > > > > > > This is crazy! smp_rmb started out being strictly stronger than > > > smp_read_barrier_depends, when did this stop being the case? > > > > Hello, Herbert! > > > > It is true that most Linux kernel code relies only on the read-read > > properties of dependencies, but the read-write properties are useful. > > Admittedly relatively rarely, but useful. > > > > The better comparison for smp_read_barrier_depends(), especially in > > its rcu_dereference*() form, is smp_load_acquire(). > > Confused.. > > I recall that last time you and Linus came into a conclusion that even > on Alpha, a barrier for read->write with data dependency is unnecessary: > > http://article.gmane.org/gmane.linux.kernel/2077661 > > And in an earlier mail of that thread, Linus made his point that > smp_read_barrier_depends() should only be used to order read->read. Those examples involved read-to-write with conditionals, as in: if (READ_ONCE(a)) WRITE_ONCE(b, 1); Without the "if", no ordering is guaranteed on weakly ordered CPUs. (The volatile accesses keep ordering within the compiler for once... > So right now, are we going to extend the semantics of > smp_read_barrier_depends()? Can we just make smp_read_barrier_depends() > still only work for read->read, and assume all the architectures won't > reorder read->write with data dependency, so that the code above having > a smp_rmb() also works? The semantics of smp_read_barrier_depends() has been both read-to-write and read-to-read for some time now, this patch just catches the documentation up with reality. Thanx, Paul
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