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Message-ID: <E959C4978C3B6342920538CF579893F00C2D034D@SHSMSX104.ccr.corp.intel.com>
Date:	Tue, 26 Jan 2016 00:57:11 +0000
From:	"Wu, Feng" <feng.wu@...el.com>
To:	Radim Krcmár <rkrcmar@...hat.com>
CC:	Paolo Bonzini <pbonzini@...hat.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"kvm@...r.kernel.org" <kvm@...r.kernel.org>,
	"Wu, Feng" <feng.wu@...el.com>
Subject: RE: [PATCH v3 1/4] KVM: Recover IRTE to remapped mode if the
 interrupt is not single-destination



> -----Original Message-----
> From: Radim Krcmár [mailto:rkrcmar@...hat.com]
> Sent: Monday, January 25, 2016 10:06 PM
> To: Wu, Feng <feng.wu@...el.com>
> Cc: Paolo Bonzini <pbonzini@...hat.com>; linux-kernel@...r.kernel.org;
> kvm@...r.kernel.org
> Subject: Re: [PATCH v3 1/4] KVM: Recover IRTE to remapped mode if the
> interrupt is not single-destination
> 
> 2016-01-25 12:26+0000, Wu, Feng:
> >> From: Paolo Bonzini [mailto:paolo.bonzini@...il.com] On Behalf Of Paolo
> >> It may be necessary because IRTE writes (128 bits) are not atomic.
> >
> > IRTE is updated atomically, I added the patch to support this. Please
> > refer to 344cb4e0b6f3a0dbef0643eacb4946338eb228c0.
> 
> I also think that SN bit is not affected by atomicity: if the IRTE could
> have been read half-updated while changing from posted to non-posted,
> then it wouldn't point to the correct PID, because its address is not
> within 64 bits, so the SN bit wouldn't matter.

Yes, like the comments in the commit, we should atomically update the
IRTE in PI case (PI -> non-PI, non-PI -> PI), without which, it cannot
guarantee the correctness, since 'pda' is not within 64 bits, like Radim
pointed out above.

Thanks,
Feng

> 
> IRTE invalidation seems important in VT-d ...

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