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Message-ID: <1453984510.2521.290.camel@linux.intel.com>
Date: Thu, 28 Jan 2016 14:35:10 +0200
From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To: linux-kernel@...r.kernel.org,
David Woodhouse <dwmw2@...radead.org>,
iommu@...ts.linux-foundation.org
Subject: Re: [PATCH v2 1/1] iommu/vt-d: use lo_hi_readq() / lo_hi_writeq()
On Thu, 2015-11-19 at 18:22 +0200, Andy Shevchenko wrote:
> There is already helper functions to do 64-bit I/O on 32-bit machines
> or buses,
> thus we don't need to reinvent the wheel.
>
Any comment on this?
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
> Cahngelog v2:
> - rebase on top of recent linux-next
> include/linux/intel-iommu.h | 18 ++----------------
> 1 file changed, 2 insertions(+), 16 deletions(-)
>
> diff --git a/include/linux/intel-iommu.h b/include/linux/intel-
> iommu.h
> index 821273c..34066ee 100644
> --- a/include/linux/intel-iommu.h
> +++ b/include/linux/intel-iommu.h
> @@ -29,6 +29,8 @@
> #include <linux/dma_remapping.h>
> #include <linux/mmu_notifier.h>
> #include <linux/list.h>
> +#include <linux/io-64-nonatomic-lo-hi.h>
> +
> #include <asm/cacheflush.h>
> #include <asm/iommu.h>
>
> @@ -71,24 +73,8 @@
>
> #define OFFSET_STRIDE (9)
>
> -#ifdef CONFIG_64BIT
> #define dmar_readq(a) readq(a)
> #define dmar_writeq(a,v) writeq(v,a)
> -#else
> -static inline u64 dmar_readq(void __iomem *addr)
> -{
> - u32 lo, hi;
> - lo = readl(addr);
> - hi = readl(addr + 4);
> - return (((u64) hi) << 32) + lo;
> -}
> -
> -static inline void dmar_writeq(void __iomem *addr, u64 val)
> -{
> - writel((u32)val, addr);
> - writel((u32)(val >> 32), addr + 4);
> -}
> -#endif
>
> #define DMAR_VER_MAJOR(v) (((v) & 0xf0) >> 4)
> #define DMAR_VER_MINOR(v) ((v) & 0x0f)
--
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy
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