linux-kernel - [PATCH 2/2] pmem: Flush cache on unaligned request

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Date:	Thu, 28 Jan 2016 11:12:50 -0700
From:	Toshi Kani <toshi.kani@....com>
To:	tglx@...utronix.de, mingo@...hat.com, hpa@...or.com, bp@...e.de,
	dan.j.williams@...el.com
Cc:	ross.zwisler@...ux.intel.com, vishal.l.verma@...el.com,
	micah.parrish@....com, brian.boylston@....com, x86@...nel.org,
	linux-nvdimm@...ts.01.org, linux-kernel@...r.kernel.org,
	Toshi Kani <toshi.kani@....com>
Subject: [PATCH 2/2] pmem: Flush cache on unaligned request

arch_memcpy_to_pmem() calls __copy_user_nocache() to copy data
via non-temporal stores.  However, __copy_user_nocache() still
performs cached copy when a request is not naturally aligned or
is less then 4 bytes.

Call clflush_cache_range() to flush destination when a request
leads to cached copy.

Signed-off-by: Toshi Kani <toshi.kani@....com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Ingo Molnar <mingo@...hat.com>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Borislav Petkov <bp@...e.de>
Cc: Dan Williams <dan.j.williams@...el.com>
Cc: Ross Zwisler <ross.zwisler@...ux.intel.com>
Cc: Vishal Verma <vishal.l.verma@...el.com>
---
 arch/x86/include/asm/pmem.h |   11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/x86/include/asm/pmem.h b/arch/x86/include/asm/pmem.h
index c57fd1e..f135064 100644
--- a/arch/x86/include/asm/pmem.h
+++ b/arch/x86/include/asm/pmem.h
@@ -45,6 +45,17 @@ static inline void arch_memcpy_to_pmem(void __pmem *dst, const void *src,
 	if (WARN(unwritten, "%s: fault copying %p <- %p unwritten: %d\n",
 				__func__, dst, src, unwritten))
 		BUG();
+
+	/*
+	 * Flush the caches when the request is not naturally aligned.
+	 * Non-temporal stores are not used for unaligned copy.
+	 */
+	if (((n >= 8) &&
+		(!IS_ALIGNED((unsigned long)dst, 8) || !IS_ALIGNED(n, 8))) ||
+	    ((n <  8) &&
+		(!IS_ALIGNED((unsigned long)dst, 4) || (n != 4)))) {
+		clflush_cache_range(dst, n);
+	}
 }
 
 /**