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Message-ID: <56AACCDC.8020306@gmail.com>
Date: Fri, 29 Jan 2016 10:22:20 +0800
From: Peter Hung <hpeter@...il.com>
To: One Thousand Gnomes <gnomes@...rguk.ukuu.org.uk>
Cc: linus.walleij@...aro.org, gnurou@...il.com,
gregkh@...uxfoundation.org, andriy.shevchenko@...ux.intel.com,
paul.gortmaker@...driver.com, lee.jones@...aro.org,
jslaby@...e.com, peter_hong@...tek.com.tw,
heikki.krogerus@...ux.intel.com, peter@...leysoftware.com,
soeren.grunewald@...y.de, udknight@...il.com,
adam.lee@...onical.com, arnd@...db.de, manabian@...il.com,
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paul.burton@...tec.com, mans@...sr.com, matthias.bgg@...il.com,
ralf@...ux-mips.org, linux-kernel@...r.kernel.org,
linux-gpio@...r.kernel.org, linux-serial@...r.kernel.org,
tom_tsai@...tek.com.tw, Peter Hung <hpeter+linux_kernel@...il.com>
Subject: Re: [PATCH V2 1/4] mfd: f81504-core: Add Fintek F81504/508/512
PCIE-to-UART/GPIO core support
Hi Alan,
One Thousand Gnomes 於 2016/1/28 下午 06:04 寫道:
>> + Please bulit-in kernel if you need early console support.
> This driver needs to be built into the kernel to use early console
> support.
>
ok
>> + switch (dev->device) {
>> + case FINTEK_F81504: /* 4 ports */
>> + /* F81504 max 2 sets of GPIO, others are max 6 sets*/
>> + gpio_en &= 0x03;
>> + case FINTEK_F81508: /* 8 ports */
>> + max_port = dev->device & 0xff;
>
> If that is meant to fall through from F81504 into F81508 it's worth
> commenting, otherwise someone reviewing the code can't always be sure it
> was intentional.
ok, I'll add comments to describe this.
>> + /* Get the UART IO address dispatch from the BIOS */
>> + pci_read_config_dword(dev, 0x24, &bar_data[0]);
>> + pci_read_config_dword(dev, 0x20, &bar_data[1]);
>> + pci_read_config_dword(dev, 0x1c, &bar_data[2]);
>
> Take these from the pci device itself. On some non PC platforms the
> values in the pci bar may be remapped by bridges and not give you the
> true answer.
>
> pci_resource_start(dev, barnumber)
>
Thanks for point this out, I'll rewrite here with pci_resource_start().
--
With Best Regards,
Peter Hung
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