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Message-ID: <56AB4182.5060501@linux.vnet.ibm.com>
Date: Fri, 29 Jan 2016 18:40:02 +0800
From: Yongji Xie <xyjxie@...ux.vnet.ibm.com>
To: Alex Williamson <alex.williamson@...hat.com>, kvm@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
linuxppc-dev@...ts.ozlabs.org, linux-doc@...r.kernel.org
Cc: bhelgaas@...gle.com, corbet@....net, aik@...abs.ru,
benh@...nel.crashing.org, paulus@...ba.org, mpe@...erman.id.au,
warrier@...ux.vnet.ibm.com, zhong@...ux.vnet.ibm.com,
nikunj@...ux.vnet.ibm.com
Subject: Re: [RFC PATCH v3 3/5] PCI: Add host bridge attribute to indicate
filtering of MSIs is supported
On 2016/1/29 6:46, Alex Williamson wrote:
> On Fri, 2016-01-15 at 15:06 +0800, Yongji Xie wrote:
>> MSI-X tables are not allowed to be mmapped in vfio-pci
>> driver in case that user get to touch this directly.
>> This will cause some performance issues when when PCI
>> adapters have critical registers in the same page as
>> the MSI-X table.
>>
>> However, some kind of PCI host bridge such as IODA bridge
>> on Power support filtering of MSIs, which can ensure that a
>> given pci device can only shoot the MSIs assigned for it.
>> So we think it's safe to expose the MSI-X table to userspace
>> if filtering of MSIs is supported because the exposed MSI-X
>> table can't be used to do harm to other memory space.
>>
>> To support this case, this patch adds a pci_host_bridge
>> attribute to indicate if this PCI host bridge supports
>> filtering of MSIs.
>>
>> Signed-off-by: Yongji Xie <xyjxie@...ux.vnet.ibm.com>
>> ---
>> drivers/pci/host-bridge.c | 6 ++++++
>> include/linux/pci.h | 3 +++
>> 2 files changed, 9 insertions(+)
>>
>> diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c
>> index 5f4a2e0..c029267 100644
>> --- a/drivers/pci/host-bridge.c
>> +++ b/drivers/pci/host-bridge.c
>> @@ -96,3 +96,9 @@ void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
>> res->end = region->end + offset;
>> }
>> EXPORT_SYMBOL(pcibios_bus_to_resource);
>> +
>> +bool pci_host_bridge_msi_filtered_enabled(struct pci_dev *pdev)
>> +{
>> + return pci_find_host_bridge(pdev->bus)->msi_filtered;
>> +}
>> +EXPORT_SYMBOL_GPL(pci_host_bridge_msi_filtered_enabled);
>> diff --git a/include/linux/pci.h b/include/linux/pci.h
>> index b640d65..b952b78 100644
>> --- a/include/linux/pci.h
>> +++ b/include/linux/pci.h
>> @@ -412,6 +412,7 @@ struct pci_host_bridge {
>> void (*release_fn)(struct pci_host_bridge *);
>> void *release_data;
>> unsigned int ignore_reset_delay:1; /* for entire hierarchy */
>> + unsigned int msi_filtered:1; /* support filtering of MSIs */
>> /* Resource alignment requirements */
>> resource_size_t (*align_resource)(struct pci_dev *dev,
>> const struct resource *res,
>> @@ -430,6 +431,8 @@ void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
>>
>> int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);
>>
>> +bool pci_host_bridge_msi_filtered_enabled(struct pci_dev *pdev);
>> +
>> /*
>> * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
>> * to P2P or CardBus bridge windows) go in a table. Additional ones (for
> Don't we already have a flag for this in the IOMMU space?
>
> enum iommu_cap {
> IOMMU_CAP_CACHE_COHERENCY, /* IOMMU can enforce cache coherent DMA
> transactions */
> ---> IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */
> IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */
> };
>
I saw this flag had been enabled in x86 and ARM arch.
I'm not sure whether we can mmap MSI-X table in those archs. I just
verify it on PPC64 arch.
Regards.
Yongji Xie
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