[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <tip-e37cee133c72c9529f74a20d9b7eb3b6dfb928b5@git.kernel.org>
Date: Fri, 29 Jan 2016 03:32:30 -0800
From: "tip-bot for Michael S. Tsirkin" <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: luto@...nel.org, tglx@...utronix.de,
virtualization@...ts.linux-foundation.org, luto@...capital.net,
dbueso@...e.de, peterz@...radead.org, linux-kernel@...r.kernel.org,
mingo@...nel.org, paulmck@...ux.vnet.ibm.com, mst@...hat.com,
dvlasenk@...hat.com, bp@...e.de, torvalds@...ux-foundation.org,
akpm@...ux-foundation.org, andreyknvl@...gle.com,
dave@...olabs.net, brgerst@...il.com, bp@...en8.de, hpa@...or.com
Subject: [tip:locking/core] locking/x86:
Drop a comment left over from X86_OOSTORE
Commit-ID: e37cee133c72c9529f74a20d9b7eb3b6dfb928b5
Gitweb: http://git.kernel.org/tip/e37cee133c72c9529f74a20d9b7eb3b6dfb928b5
Author: Michael S. Tsirkin <mst@...hat.com>
AuthorDate: Thu, 28 Jan 2016 19:02:37 +0200
Committer: Ingo Molnar <mingo@...nel.org>
CommitDate: Fri, 29 Jan 2016 09:40:10 +0100
locking/x86: Drop a comment left over from X86_OOSTORE
The comment about wmb being non-NOP to deal with non-Intel CPUs
is a left over from before the following commit:
09df7c4c8097 ("x86: Remove CONFIG_X86_OOSTORE")
It makes no sense now: in particular, wmb() is not a NOP even for
regular Intel CPUs because of weird use-cases e.g. dealing with
WC memory.
Drop this comment.
Signed-off-by: Michael S. Tsirkin <mst@...hat.com>
Acked-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Cc: Andrew Morton <akpm@...ux-foundation.org>
Cc: Andrey Konovalov <andreyknvl@...gle.com>
Cc: Andy Lutomirski <luto@...capital.net>
Cc: Andy Lutomirski <luto@...nel.org>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Borislav Petkov <bp@...e.de>
Cc: Brian Gerst <brgerst@...il.com>
Cc: Davidlohr Bueso <dave@...olabs.net>
Cc: Davidlohr Bueso <dbueso@...e.de>
Cc: Denys Vlasenko <dvlasenk@...hat.com>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Paul E. McKenney <paulmck@...ux.vnet.ibm.com>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: virtualization <virtualization@...ts.linux-foundation.org>
Link: http://lkml.kernel.org/r/1453921746-16178-3-git-send-email-mst@redhat.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
arch/x86/include/asm/barrier.h | 4 ----
1 file changed, 4 deletions(-)
diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
index a65bdb1..a291745 100644
--- a/arch/x86/include/asm/barrier.h
+++ b/arch/x86/include/asm/barrier.h
@@ -11,10 +11,6 @@
*/
#ifdef CONFIG_X86_32
-/*
- * Some non-Intel clones support out of order store. wmb() ceases to be a
- * nop for these.
- */
#define mb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "mfence", \
X86_FEATURE_XMM2) ::: "memory", "cc")
#define rmb() asm volatile(ALTERNATIVE("lock; addl $0,0(%%esp)", "lfence", \
Powered by blists - more mailing lists