linux-kernel - Re: [linux-sunxi] [PATCH 0/3] mmc: sunxi: Support eMMC DDR modes

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <56ADD685.1080006@redhat.com>
Date:	Sun, 31 Jan 2016 10:40:21 +0100
From:	Hans de Goede <hdegoede@...hat.com>
To:	Chen-Yu Tsai <wens@...e.org>, Ulf Hansson <ulf.hansson@...aro.org>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc:	linux-mmc@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com
Subject: Re: [linux-sunxi] [PATCH 0/3] mmc: sunxi: Support eMMC DDR modes

Hi,

On 01/29/2016 06:21 PM, Chen-Yu Tsai wrote:
> Hi everyone,
>
> This was "mmc: sunxi: Support vqmmc regulator and eMMC DDR modes". vqmmc
> support and DT patches were merged even though it was an RFC series, to
> my suprise.
>
> These are the remaining patches that add eMMC HS-DDR support to sunxi.
>
> Patch 1 adds timing delays for MMC_DDR52 mode.
>
> Patch 2 adds support for 8 bit eMMC DDR52 mode. Under this mode, the
> controller must run at twice the card clock, and different timing delays
> are needed.
>
> Patch 3 enables eMMC HS-DDR for sunxi-mmc.

All 3 patches look good to me:

Reviewed-by: Hans de Goede <hdegoede@...hat.com>

Regards,

Hans