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Message-ID: <tip-284b965c146f482b4a411133f62288d52b7e3a72@git.kernel.org>
Date:	Mon, 1 Feb 2016 03:40:52 -0800
From:	tip-bot for Aravind Gopalakrishnan <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
	mingo@...nel.org, bp@...en8.de, peterz@...radead.org,
	tglx@...utronix.de, torvalds@...ux-foundation.org,
	Aravind.Gopalakrishnan@....com, bp@...e.de, tony.luck@...el.com,
	hpa@...or.com, fengguang.wu@...el.com
Subject: [tip:ras/core] x86/mce/AMD:
  Do not perform shared bank check for future processors

Commit-ID:  284b965c146f482b4a411133f62288d52b7e3a72
Gitweb:     http://git.kernel.org/tip/284b965c146f482b4a411133f62288d52b7e3a72
Author:     Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
AuthorDate: Mon, 25 Jan 2016 20:41:49 +0100
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Mon, 1 Feb 2016 10:53:56 +0100

x86/mce/AMD: Do not perform shared bank check for future processors

Fam17h and above should not require a check to see if a bank is
shared or not. For shared banks, there will always be only one
core that has visibility over the MSRs and only that particular
core will be allowed to write to the MSRs.

Fix the code to return early if we have Scalable MCA support. No
change in functionality for earlier processors.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
Signed-off-by: Fengguang Wu <fengguang.wu@...el.com>
[ Massaged the changelog text, fixed kbuild test robot build warning. ]
Signed-off-by: Borislav Petkov <bp@...e.de>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Tony Luck <tony.luck@...el.com>
Cc: linux-edac <linux-edac@...r.kernel.org>
Link: http://lkml.kernel.org/r/1453750913-4781-5-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/kernel/cpu/mcheck/mce_amd.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c
index e99b150..3068ce2 100644
--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c
+++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c
@@ -84,6 +84,13 @@ struct thresh_restart {
 
 static inline bool is_shared_bank(int bank)
 {
+	/*
+	 * Scalable MCA provides for only one core to have access to the MSRs of
+	 * a shared bank.
+	 */
+	if (mce_flags.smca)
+		return false;
+
 	/* Bank 4 is for northbridge reporting and is thus shared */
 	return (bank == 4);
 }

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