linux-kernel - Re: [PATCH 03/14] clk: sunxi: add bus gates for A83T

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Message-ID: <20160201150344.GA4947@rob-hp-laptop>
Date:	Mon, 1 Feb 2016 09:03:44 -0600
From:	Rob Herring <robh@...nel.org>
To:	Vishnu Patekar <vishnupatekar0510@...il.com>
Cc:	corbet@....net, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	maxime.ripard@...e-electrons.com, linux@....linux.org.uk,
	emilio@...pez.com.ar, jenskuske@...il.com, hdegoede@...hat.com,
	wens@...e.org, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	linux-sunxi@...glegroups.com, linux-gpio@...r.kernel.org,
	linus.walleij@...aro.org, mturquette@...libre.com,
	sboyd@...eaurora.org, patchesrdh@...as.com,
	linux-clk@...r.kernel.org
Subject: Re: [PATCH 03/14] clk: sunxi: add bus gates for A83T

On Sun, Jan 31, 2016 at 09:20:55AM +0800, Vishnu Patekar wrote:
> A83T has similar bus gates that of H3, including single gating register has
> different clock parent.
> 
> As per H3 and A83T datasheet, usbhost is under AHB2.
> 
> However,below shows allwinner source code assignment:
> bits: 26 (ehci0), 27 (ehci1), 29 (ohci0) => AHB1 for A83T.
> bits: 26 (ehci0), 27 (ehci1) => AHB1 for H3
> bits  29, 30, 31(ohci0,1,2) => AHB2 for H3.
> 
> until, this confusion is cleared keep it H3 way.
> 
> Signed-off-by: Vishnu Patekar <vishnupatekar0510@...il.com>
> ---
>  Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
>  drivers/clk/sunxi/clk-sun8i-bus-gates.c           | 2 ++
>  2 files changed, 3 insertions(+)

Acked-by: Rob Herring <robh@...nel.org>