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Date: Tue, 2 Feb 2016 14:17:25 +0100
From: Maxime Ripard <maxime.ripard@...e-electrons.com>
To: Vishnu Patekar <vishnupatekar0510@...il.com>
Cc: robh+dt@...nel.org, corbet@....net, pawel.moll@....com,
mark.rutland@....com, ijc+devicetree@...lion.org.uk,
galak@...eaurora.org, linux@....linux.org.uk, emilio@...pez.com.ar,
jenskuske@...il.com, hdegoede@...hat.com, wens@...e.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com,
linux-gpio@...r.kernel.org, linus.walleij@...aro.org,
mturquette@...libre.com, sboyd@...eaurora.org,
patchesrdh@...as.com, linux-clk@...r.kernel.org
Subject: Re: [PATCH 04/14] clk: sunxi: add ahb1 clock for A83T
Hi,
On Sun, Jan 31, 2016 at 09:20:56AM +0800, Vishnu Patekar wrote:
> AHB1 on A83T is similar to ahb1 on A31, except parents are different.
> clock index 0b1x is PLL6.
>
> Signed-off-by: Vishnu Patekar <vishnupatekar0510@...il.com>
If the clock is the same but the parents are different, then we don't
need to duplicate all the logic. Simply add the number of parents to
mux_data, and you're all set.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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