linux-kernel - Re: [alsa-devel] [PATCH RFC 07/15] ASoC: qcom: add mic related i2s control register defines

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Date:	Tue, 2 Feb 2016 16:36:38 -0800
From:	Kenneth Westfield <kwestfie@...eaurora.org>
To:	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
Cc:	Patrick Lai <plai@...eaurora.org>, alsa-devel@...a-project.org,
	Banajit Goswami <bgoswami@...eaurora.org>,
	Liam Girdwood <lgirdwood@...il.com>,
	linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
	Takashi Iwai <tiwai@...e.com>, Mark Brown <broonie@...nel.org>
Subject: Re: [alsa-devel] [PATCH RFC 07/15] ASoC: qcom: add mic related i2s
 control register defines

On Mon, Feb 01, 2016 at 09:28:55AM -0800, Srinivas Kandagatla wrote:
> diff --git a/sound/soc/qcom/lpass-lpaif-reg.h
> b/sound/soc/qcom/lpass-lpaif-reg.h
> index 95e22f1..8a64d1a 100644
> --- a/sound/soc/qcom/lpass-lpaif-reg.h
> +++ b/sound/soc/qcom/lpass-lpaif-reg.h
> @@ -47,6 +47,28 @@

...

> +#define LPAIF_I2SCTL_MICMODE_MASK	GENMASK(7, 4)
> +#define LPAIF_I2SCTL_MICMODE_SHIFT	4
> +#define LPAIF_I2SCTL_MICMODE_NONE	(0 << LPAIF_I2SCTL_MICMODE_SHIFT)
> +#define LPAIF_I2SCTL_MICMODE_SD0	(1 << LPAIF_I2SCTL_MICMODE_SHIFT)
> +#define LPAIF_I2SCTL_MICMODE_SD1	(2 << LPAIF_I2SCTL_MICMODE_SHIFT)
> +#define LPAIF_I2SCTL_MICMODE_SD2	(3 << LPAIF_I2SCTL_MICMODE_SHIFT)
> +#define LPAIF_I2SCTL_MICMODE_SD3	(4 << LPAIF_I2SCTL_MICMODE_SHIFT)
> +#define LPAIF_I2SCTL_MICMODE_QUAD01	(5 << LPAIF_I2SCTL_MICMODE_SHIFT)
> +#define LPAIF_I2SCTL_MICMODE_QUAD02	(6 << LPAIF_I2SCTL_MICMODE_SHIFT)
> +#define LPAIF_I2SCTL_MICMODE_6CH	(7 << LPAIF_I2SCTL_MICMODE_SHIFT)
> +#define LPAIF_I2SCTL_MICMODE_8CH	(8 << LPAIF_I2SCTL_MICMODE_SHIFT)

LPAIF_I2SCTL_MICMODE_QUAD02 should be LPAIF_I2SCTL_MICMODE_QUAD23, as
the suffix numbers refer to SD[0-3].

-- 
Kenneth Westfield
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, 
a Linux Foundation Collaborative Project