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Date:	Wed, 3 Feb 2016 16:17:29 +0000
From:	Paul Burton <paul.burton@...tec.com>
To:	<linux-mips@...ux-mips.org>, Ralf Baechle <ralf@...ux-mips.org>
CC:	Paul Burton <paul.burton@...tec.com>,
	Joshua Kinard <kumba@...too.org>,
	Leonid Yegoshin <Leonid.Yegoshin@...tec.com>,
	Paul Gortmaker <paul.gortmaker@...driver.com>,
	<linux-kernel@...r.kernel.org>,
	"Maciej W. Rozycki" <macro@...esourcery.com>,
	Markos Chandras <markos.chandras@...tec.com>
Subject: [PATCH 2/3] MIPS: Add M6250 cases to CPU switch statements

Add casses supporting the M6250 CPU to various switch statements in the
core MIPS kernel code that define behaviour dependent upon the CPU.

Signed-off-by: Paul Burton <paul.burton@...tec.com>
---

 arch/mips/include/asm/cpu-type.h | 4 ++++
 arch/mips/mm/c-r4k.c             | 1 +
 2 files changed, 5 insertions(+)

diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index 2cb0979..fbe1881 100644
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -77,6 +77,10 @@ static inline int __pure __get_cpu_type(const int cpu_type)
 	 */
 #endif
 
+#ifdef CONFIG_SYS_HAS_CPU_MIPS32_R6
+	case CPU_M6250:
+#endif
+
 #ifdef CONFIG_SYS_HAS_CPU_MIPS64_R6
 	case CPU_I6400:
 	case CPU_P6600:
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 2f47999..141161a 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1279,6 +1279,7 @@ static void probe_pcache(void)
 	case CPU_QEMU_GENERIC:
 	case CPU_I6400:
 	case CPU_P6600:
+	case CPU_M6250:
 		if (!(read_c0_config7() & MIPS_CONF7_IAR) &&
 		    (c->icache.waysize > PAGE_SIZE))
 			c->icache.flags |= MIPS_CACHE_ALIASES;
-- 
2.7.0

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