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Message-ID: <1454602213-967-1-git-send-email-paul.burton@imgtec.com>
Date: Thu, 4 Feb 2016 16:10:07 +0000
From: Paul Burton <paul.burton@...tec.com>
To: <linux-mips@...ux-mips.org>
CC: Bharat Kumar Gogada <bharatku@...inx.com>,
Michal Simek <michal.simek@...inx.com>,
Ravikiran Gummaluri <rgummal@...inx.com>,
"Paul Burton" <paul.burton@...tec.com>,
Ley Foon Tan <lftan@...era.com>,
"Arnd Bergmann" <arnd@...db.de>,
Grygorii Strashko <grygorii.strashko@...com>,
Russell Joyce <russell.joyce@...k.ac.uk>,
Bjorn Helgaas <bhelgaas@...gle.com>,
<linux-pci@...r.kernel.org>, Jingoo Han <jingoohan1@...il.com>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Ray Jui <rjui@...adcom.com>,
Sören Brinkmann <soren.brinkmann@...inx.com>,
Scott Branden <sbranden@...adcom.com>,
"Thomas Gleixner" <tglx@...utronix.de>,
Phil Edworthy <phil.edworthy@...esas.com>,
Hauke Mehrtens <hauke@...ke-m.de>,
Jiang Liu <jiang.liu@...ux.intel.com>,
"Rob Herring" <robh@...nel.org>, Duc Dang <dhdang@....com>,
Gabriele Paoloni <gabriele.paoloni@...wei.com>,
<linux-arm-kernel@...ts.infradead.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
<linux-kernel@...r.kernel.org>,
Stanimir Varbanov <svarbanov@...sol.com>,
Marc Zyngier <marc.zyngier@....com>
Subject: [PATCH v3 0/6] Xilinx AXI PCIe Host Bridge driver fixes
This series fixes a number of issues found using the Xilinx AXI PCIe
Host Bridge IP on the Imagination Technologies MIPS Boston development
board. It has been split out of the larger Boston board support series
at Michal's request.
Applies atop v4.5-rc2.
Paul Burton (6):
PCI: xilinx: Keep references to both IRQ domains
PCI: xilinx: Unify INTx & MSI interrupt FIFO decode
PCI: xilinx: Always clear interrupt decode register
PCI: xilinx: Clear interrupt FIFO during probe
PCI: xilinx: Fix INTX irq dispatch
PCI: xilinx: Allow build on MIPS platforms
drivers/pci/host/Kconfig | 2 +-
drivers/pci/host/pcie-xilinx.c | 125 +++++++++++++++++++----------------------
2 files changed, 60 insertions(+), 67 deletions(-)
--
2.7.0
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