linux-kernel - Re: [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx

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Message-ID: <CAGb2v67Wd_ZSJEdKm7b6dRzqAzGO3i61c1akVH+62xYnRF8Sfw@mail.gmail.com>
Date:	Fri, 5 Feb 2016 17:45:12 +0800
From:	Chen-Yu Tsai <wens@...e.org>
To:	Krzysztof Adamski <k@...ko.eu>
Cc:	inus Walleij <linus.walleij@...aro.org>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	Chen-Yu Tsai <wens@...e.org>,
	Hans de Goede <hdegoede@...hat.com>,
	Lee Jones <lee@...nel.org>, Rob Herring <robh@...nel.org>,
	Jens Kuske <jenskuske@...il.com>,
	Fabian Frederick <fabf@...net.be>,
	Vishnu Patekar <vishnupatekar0510@...il.com>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	linux-sunxi <linux-sunxi@...glegroups.com>
Subject: Re: [PATCH v3 5/5] pinctrl: sunxi: Use pin number when calling sunxi_pmx_set

On Thu, Feb 4, 2016 at 7:33 AM, Krzysztof Adamski <k@...ko.eu> wrote:
> sunxi_pmx_set accepts pin number and then calculates offset by
> subtracting pin_base from it. sunxi_pinctrl_gpio_get, on the other hand,
> gets offset so we have to convert it to pin number so we won't get
> negative value in sunxi_pmx_set.
>
> This was only used on A10 so far, where there is only one GPIO chip with
> pin_base set to 0 so it didn't matter. However H3 also requires this
> workaround but have two pinmux sections, triggering problem for PL port.
>
> Signed-off-by: Krzysztof Adamski <k@...ko.eu>

Acked-by: Chen-Yu Tsai <wens@...e.org>

(resent as my mail setup failed to deliver)