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Message-ID: <87h9hn5msz.fsf@ashishki-desk.ger.corp.intel.com>
Date: Fri, 05 Feb 2016 15:06:20 +0200
From: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
To: Chunyan Zhang <zhang.chunyan@...aro.org>,
mathieu.poirier@...aro.org
Cc: robh@...nel.org, broonie@...nel.org, pratikp@...eaurora.org,
nicolas.guion@...com, corbet@....net, mark.rutland@....com,
mike.leach@....com, tor@...com, al.grant@....com,
zhang.lyra@...il.com, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-api@...r.kernel.org,
linux-doc@...r.kernel.org, Russell King <linux@....linux.org.uk>
Subject: Re: [PATCH V2 6/6] coresight-stm: adding driver for CoreSight STM component
Chunyan Zhang <zhang.chunyan@...aro.org> writes:
> +#ifndef CONFIG_64BIT
> +static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
> +{
> + asm volatile("strd %1, %0"
> + : "+Qo" (*(volatile u64 __force *)addr)
> + : "r" (val));
> +}
Is it really ok to do this for all !64bit arms, inside a driver, just
like that? I'm not an expert, but I'm pretty sure there's more to it.
Regards,
--
Alex
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