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Message-ID: <20160208105322.78b20cba@free-electrons.com>
Date: Mon, 8 Feb 2016 10:53:22 +0100
From: Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>
To: Marc Zyngier <marc.zyngier@....com>
Cc: Antoine Tenart <antoine.tenart@...e-electrons.com>,
tglx@...utronix.de, jason@...edaemon.net, tsahee@...apurnalabs.com,
rshitrit@...apurnalabs.com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/6] irqchip: add the Alpine MSIX interrupt controller
Hello Marc,
On Mon, 8 Feb 2016 09:44:49 +0000, Marc Zyngier wrote:
> > +static struct msi_domain_info alpine_msix_domain_info = {
> > + .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
> > + MSI_FLAG_PCI_MSIX,
>
> You can probably add MSI_FLAG_PCI_MSI, it should work as well (MULTI_MSI
> obviously won't).
Why wouldn't MULTI_MSI work? The code is using
bitmap_find_next_zero_area() in alpine_msix_allocate_sgi() precisely to
find num_req consecutive bits set to 0, in order to allocate multiple
MSIs at once. Am I missing something?
Thanks,
Thomas
--
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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