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Message-ID: <56B8A638.1040903@arm.com>
Date: Mon, 8 Feb 2016 14:29:12 +0000
From: Marc Zyngier <marc.zyngier@....com>
To: Antoine Tenart <antoine.tenart@...e-electrons.com>,
Thomas Gleixner <tglx@...utronix.de>
Cc: jason@...edaemon.net, tsahee@...apurnalabs.com,
rshitrit@...apurnalabs.com, thomas.petazzoni@...e-electrons.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/6] irqchip: add the Alpine MSIX interrupt controller
On 08/02/16 14:17, Antoine Tenart wrote:
> Thomas,
>
> On Mon, Feb 08, 2016 at 11:31:47AM +0100, Thomas Gleixner wrote:
>> On Mon, 8 Feb 2016, Antoine Tenart wrote:
>>> +static int alpine_msix_set_affinity(struct irq_data *irq_data,
>>> + const struct cpumask *mask, bool force)
>>> +{
>>> + int ret;
>>> +
>>> + ret = irq_chip_set_affinity_parent(irq_data, mask, force);
>>> + return ret == IRQ_SET_MASK_OK ? IRQ_SET_MASK_OK_DONE : ret;
>>
>> What's the point of this exercise? Why can't you just set the affinity
>> callback to irq_chip_set_affinity_parent() ?
>
> That's what done in irq-gic-v2m.c. Besides that, I see no point. I'll
> update for v2.
That's because there is no need to do another compose_msi_msg/write_msg
in msi_domain_set_affinity() once the affinity has been updated at the
GIC level. Alternatively, updating the GIC driver to always return
IRQ_SET_MASK_OK_DONE would be perfectly acceptable.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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