| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Wed, 10 Feb 2016 10:55:23 +0100
From: Borislav Petkov <bp@...en8.de>
To: Ingo Molnar <mingo@...nel.org>
Cc: X86 ML <x86@...nel.org>, LKML <linux-kernel@...r.kernel.org>
Subject: [PATCH 17/17] perf/x86: Move perf_event.h to its new home
From: Borislav Petkov <bp@...e.de>
Now that all functionality has been moved to arch/x86/events/, move the
perf_event.h header and adjust include paths.
Signed-off-by: Borislav Petkov <bp@...e.de>
Cc: Arnaldo Carvalho de Melo <acme@...hat.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Ingo Molnar <mingo@...nel.org>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <a.p.zijlstra@...llo.nl>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Stephane Eranian <eranian@...gle.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Vince Weaver <vincent.weaver@...ne.edu>
---
arch/x86/events/amd/core.c | 2 +-
arch/x86/events/amd/ibs.c | 2 +-
arch/x86/events/amd/iommu.c | 2 +-
arch/x86/events/core.c | 2 +-
arch/x86/events/intel/bts.c | 2 +-
arch/x86/events/intel/core.c | 2 +-
arch/x86/events/intel/cqm.c | 2 +-
arch/x86/events/intel/cstate.c | 2 +-
arch/x86/events/intel/ds.c | 2 +-
arch/x86/events/intel/knc.c | 2 +-
arch/x86/events/intel/lbr.c | 2 +-
arch/x86/events/intel/p4.c | 2 +-
arch/x86/events/intel/p6.c | 2 +-
arch/x86/events/intel/pt.c | 2 +-
arch/x86/events/intel/rapl.c | 2 +-
arch/x86/events/intel/uncore.h | 2 +-
arch/x86/{kernel/cpu => events}/perf_event.h | 0
arch/x86/xen/pmu.c | 2 +-
18 files changed, 17 insertions(+), 17 deletions(-)
rename arch/x86/{kernel/cpu => events}/perf_event.h (100%)
diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
index 51b16583679c..049ada8d4e9c 100644
--- a/arch/x86/events/amd/core.c
+++ b/arch/x86/events/amd/core.c
@@ -5,7 +5,7 @@
#include <linux/slab.h>
#include <asm/apicdef.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
static __initconst const u64 amd_hw_cache_event_ids
[PERF_COUNT_HW_CACHE_MAX]
diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index a8abd082d932..51087c29b2c2 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -14,7 +14,7 @@
#include <asm/apic.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
static u32 ibs_caps;
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index 629bc700eb08..635e5eba0caf 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -16,7 +16,7 @@
#include <linux/cpumask.h>
#include <linux/slab.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
#include "iommu.h"
#define COUNTER_SHIFT 16
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 90ca601b5d5c..7402c8182813 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -37,7 +37,7 @@
#include <asm/desc.h>
#include <asm/ldt.h>
-#include "../kernel/cpu/perf_event.h"
+#include "perf_event.h"
struct x86_pmu x86_pmu __read_mostly;
diff --git a/arch/x86/events/intel/bts.c b/arch/x86/events/intel/bts.c
index 2bd4833367a7..b99dc9258c0f 100644
--- a/arch/x86/events/intel/bts.c
+++ b/arch/x86/events/intel/bts.c
@@ -26,7 +26,7 @@
#include <asm-generic/sizes.h>
#include <asm/perf_event.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
struct bts_ctx {
struct perf_output_handle handle;
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 1edf3013e528..a7ec685657a5 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -18,7 +18,7 @@
#include <asm/hardirq.h>
#include <asm/apic.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
/*
* Intel PerfMon, used on Core and later.
diff --git a/arch/x86/events/intel/cqm.c b/arch/x86/events/intel/cqm.c
index d1b623a15ac0..1b064c430140 100644
--- a/arch/x86/events/intel/cqm.c
+++ b/arch/x86/events/intel/cqm.c
@@ -7,7 +7,7 @@
#include <linux/perf_event.h>
#include <linux/slab.h>
#include <asm/cpu_device_id.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
#define MSR_IA32_PQR_ASSOC 0x0c8f
#define MSR_IA32_QM_CTR 0x0c8e
diff --git a/arch/x86/events/intel/cstate.c b/arch/x86/events/intel/cstate.c
index 1bbf37e8604b..7946c4231169 100644
--- a/arch/x86/events/intel/cstate.c
+++ b/arch/x86/events/intel/cstate.c
@@ -89,7 +89,7 @@
#include <linux/slab.h>
#include <linux/perf_event.h>
#include <asm/cpu_device_id.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
#define DEFINE_CSTATE_FORMAT_ATTR(_var, _name, _format) \
static ssize_t __cstate_##_var##_show(struct kobject *kobj, \
diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 9677207a2ab1..c8a243d6fc82 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -5,7 +5,7 @@
#include <asm/perf_event.h>
#include <asm/insn.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
/* The size of a BTS record in bytes: */
#define BTS_RECORD_SIZE 24
diff --git a/arch/x86/events/intel/knc.c b/arch/x86/events/intel/knc.c
index 630bcba91b16..206226e08f49 100644
--- a/arch/x86/events/intel/knc.c
+++ b/arch/x86/events/intel/knc.c
@@ -5,7 +5,7 @@
#include <asm/hardirq.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
static const u64 knc_perfmon_event_map[] =
{
diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
index 78c88f9293cc..69dd11887dd1 100644
--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -5,7 +5,7 @@
#include <asm/msr.h>
#include <asm/insn.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
enum {
LBR_FORMAT_32 = 0x00,
diff --git a/arch/x86/events/intel/p4.c b/arch/x86/events/intel/p4.c
index 1c72fedd96d3..0a5ede187d9c 100644
--- a/arch/x86/events/intel/p4.c
+++ b/arch/x86/events/intel/p4.c
@@ -13,7 +13,7 @@
#include <asm/hardirq.h>
#include <asm/apic.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
#define P4_CNTR_LIMIT 3
/*
diff --git a/arch/x86/events/intel/p6.c b/arch/x86/events/intel/p6.c
index ee5c4e8bd556..1f5c47ab4c65 100644
--- a/arch/x86/events/intel/p6.c
+++ b/arch/x86/events/intel/p6.c
@@ -1,7 +1,7 @@
#include <linux/perf_event.h>
#include <linux/types.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
/*
* Not sure about some of these
diff --git a/arch/x86/events/intel/pt.c b/arch/x86/events/intel/pt.c
index e56cebe07994..6af7cf71d6b2 100644
--- a/arch/x86/events/intel/pt.c
+++ b/arch/x86/events/intel/pt.c
@@ -29,7 +29,7 @@
#include <asm/io.h>
#include <asm/intel_pt.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
#include "pt.h"
static DEFINE_PER_CPU(struct pt, pt_ctx);
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index 9541f50a534a..580f504ec27c 100644
--- a/arch/x86/events/intel/rapl.c
+++ b/arch/x86/events/intel/rapl.c
@@ -48,7 +48,7 @@
#include <linux/slab.h>
#include <linux/perf_event.h>
#include <asm/cpu_device_id.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
/*
* RAPL energy status counters
diff --git a/arch/x86/events/intel/uncore.h b/arch/x86/events/intel/uncore.h
index 1dea2046990a..6a1340c7f3cc 100644
--- a/arch/x86/events/intel/uncore.h
+++ b/arch/x86/events/intel/uncore.h
@@ -2,7 +2,7 @@
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/perf_event.h>
-#include "../../kernel/cpu/perf_event.h"
+#include "../perf_event.h"
#define UNCORE_PMU_NAME_LEN 32
#define UNCORE_PMU_HRTIMER_INTERVAL (60LL * NSEC_PER_SEC)
diff --git a/arch/x86/kernel/cpu/perf_event.h b/arch/x86/events/perf_event.h
similarity index 100%
rename from arch/x86/kernel/cpu/perf_event.h
rename to arch/x86/events/perf_event.h
diff --git a/arch/x86/xen/pmu.c b/arch/x86/xen/pmu.c
index 724a08740a04..9466354d3e49 100644
--- a/arch/x86/xen/pmu.c
+++ b/arch/x86/xen/pmu.c
@@ -11,7 +11,7 @@
#include "pmu.h"
/* x86_pmu.handle_irq definition */
-#include "../kernel/cpu/perf_event.h"
+#include "../events/perf_event.h"
#define XENPMU_IRQ_PROCESSING 1
struct xenpmu {
--
2.3.5
Powered by blists - more mailing lists