linux-kernel - Re: [PATCH RESEND 4/7] mfd: cs47l24: Fix defaults array based on testing

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Message-ID: <20160210161735.GG3782@x1>
Date:	Wed, 10 Feb 2016 16:17:36 +0000
From:	Lee Jones <lee.jones@...aro.org>
To:	Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>
Cc:	linux-kernel@...r.kernel.org, patches@...nsource.wolfsonmicro.com
Subject: Re: [PATCH RESEND 4/7] mfd: cs47l24: Fix defaults array based on
 testing

On Tue, 09 Feb 2016, Charles Keepax wrote:

> My automated test is back and now can check defaults against the actual
> hardware. This patch updates the defaults array for the differences
> detected and removes a couple of completely unused registers.
> 
> Signed-off-by: Charles Keepax <ckeepax@...nsource.wolfsonmicro.com>
> ---
>  drivers/mfd/cs47l24-tables.c | 10 +---------
>  1 file changed, 1 insertion(+), 9 deletions(-)

Applied, thanks.

> diff --git a/drivers/mfd/cs47l24-tables.c b/drivers/mfd/cs47l24-tables.c
> index 8708006..f6b78aa 100644
> --- a/drivers/mfd/cs47l24-tables.c
> +++ b/drivers/mfd/cs47l24-tables.c
> @@ -227,8 +227,6 @@ static const struct reg_default cs47l24_reg_default[] = {
>  	{ 0x00000174, 0x007D },    /* R372   - FLL1 Control 4 */
>  	{ 0x00000175, 0x0006 },    /* R373   - FLL1 Control 5 */
>  	{ 0x00000176, 0x0000 },    /* R374   - FLL1 Control 6 */
> -	{ 0x00000177, 0x0281 },    /* R375   - FLL1 Loop Filter Test 1 */
> -	{ 0x00000178, 0x0000 },    /* R376   - FLL1 NCO Test 0 */
>  	{ 0x00000179, 0x0000 },    /* R376   - FLL1 Control 7 */
>  	{ 0x00000181, 0x0000 },    /* R385   - FLL1 Synchroniser 1 */
>  	{ 0x00000182, 0x0000 },    /* R386   - FLL1 Synchroniser 2 */
> @@ -245,8 +243,6 @@ static const struct reg_default cs47l24_reg_default[] = {
>  	{ 0x00000194, 0x007D },    /* R404   - FLL2 Control 4 */
>  	{ 0x00000195, 0x000C },    /* R405   - FLL2 Control 5 */
>  	{ 0x00000196, 0x0000 },    /* R406   - FLL2 Control 6 */
> -	{ 0x00000197, 0x0000 },    /* R407   - FLL2 Loop Filter Test 1 */
> -	{ 0x00000198, 0x0000 },    /* R408   - FLL2 NCO Test 0 */
>  	{ 0x00000199, 0x0000 },    /* R408   - FLL2 Control 7 */
>  	{ 0x000001A1, 0x0000 },    /* R417   - FLL2 Synchroniser 1 */
>  	{ 0x000001A2, 0x0000 },    /* R418   - FLL2 Synchroniser 2 */
> @@ -678,7 +674,7 @@ static const struct reg_default cs47l24_reg_default[] = {
>  	{ 0x00000C0F, 0x0400 },    /* R3087  - IRQ CTRL 1 */
>  	{ 0x00000C10, 0x1000 },    /* R3088  - GPIO Debounce Config */
>  	{ 0x00000C20, 0x0002 },    /* R3104  - Misc Pad Ctrl 1 */
> -	{ 0x00000C21, 0x8001 },    /* R3105  - Misc Pad Ctrl 2 */
> +	{ 0x00000C21, 0x0000 },    /* R3105  - Misc Pad Ctrl 2 */
>  	{ 0x00000C22, 0x0000 },    /* R3106  - Misc Pad Ctrl 3 */
>  	{ 0x00000C23, 0x0000 },    /* R3107  - Misc Pad Ctrl 4 */
>  	{ 0x00000C24, 0x0000 },    /* R3108  - Misc Pad Ctrl 5 */
> @@ -858,8 +854,6 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL1_CONTROL_5:
>  	case ARIZONA_FLL1_CONTROL_6:
>  	case ARIZONA_FLL1_CONTROL_7:
> -	case ARIZONA_FLL1_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL1_NCO_TEST_0:
>  	case ARIZONA_FLL1_SYNCHRONISER_1:
>  	case ARIZONA_FLL1_SYNCHRONISER_2:
>  	case ARIZONA_FLL1_SYNCHRONISER_3:
> @@ -876,8 +870,6 @@ static bool cs47l24_readable_register(struct device *dev, unsigned int reg)
>  	case ARIZONA_FLL2_CONTROL_5:
>  	case ARIZONA_FLL2_CONTROL_6:
>  	case ARIZONA_FLL2_CONTROL_7:
> -	case ARIZONA_FLL2_LOOP_FILTER_TEST_1:
> -	case ARIZONA_FLL2_NCO_TEST_0:
>  	case ARIZONA_FLL2_SYNCHRONISER_1:
>  	case ARIZONA_FLL2_SYNCHRONISER_2:
>  	case ARIZONA_FLL2_SYNCHRONISER_3:

-- 
Lee Jones
Linaro STMicroelectronics Landing Team Lead
Linaro.org │ Open source software for ARM SoCs
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