linux-kernel - Re: [PATCH v10 3/4] x86, mce: Add __mcsafe

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Message-ID: <20160210205035.GB11832@pd.tnic>
Date:	Wed, 10 Feb 2016 21:50:35 +0100
From:	Borislav Petkov <bp@...en8.de>
To:	"Luck, Tony" <tony.luck@...el.com>
Cc:	Ingo Molnar <mingo@...nel.org>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Andy Lutomirski <luto@...nel.org>,
	Dan Williams <dan.j.williams@...el.com>, elliott@....com,
	Brian Gerst <brgerst@...il.com>, linux-kernel@...r.kernel.org,
	linux-mm@...ck.org, linux-nvdimm@...1.01.org, x86@...nel.org
Subject: Re: [PATCH v10 3/4] x86, mce: Add __mcsafe_copy()

On Wed, Feb 10, 2016 at 11:39:05AM -0800, Luck, Tony wrote:
> On Wed, Feb 10, 2016 at 11:58:43AM +0100, Borislav Petkov wrote:
> > But one could take out that function do some microbenchmarking with
> > different sizes and once with the current version and once with the
> > pushes and pops of r1[2-5] to see where the breakeven is.
> 
> On a 4K page copy from a source address that isn't in the
> cache I see all sorts of answers.
> 
> On my desktop (i7-3960X) it is ~50 cycles slower to push and pop the four
> registers.
> 
> On my latest Xeon - I can't post benchmarks ... but also a bit slower.
> 
> On an older Xeon it is a few cycles faster (but even though I'm
> looking at the median of 10,000 runs I see more run-to-run variation
> that I see difference between register choices.

Hmm, strange. Can you check whether perf doesn't show any significant
differences too. Something like:

perf stat --repeat 100 --sync --pre 'echo 3 > /proc/sys/vm/drop_caches' -- ./mcsafe_copy_1

and then

perf stat --repeat 100 --sync --pre 'echo 3 > /proc/sys/vm/drop_caches' -- ./mcsafe_copy_2

That'll be interesting...

Thanks.

-- 
Regards/Gruss,
    Boris.

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