linux-kernel - Re: [PATCH V7 3/6] i2c: qup: Transfer each i2c_msg in i2c

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Message-ID: <20160212183815.GD1520@katana>
Date:	Fri, 12 Feb 2016 19:38:15 +0100
From:	Wolfram Sang <wsa@...-dreams.de>
To:	Sricharan R <sricharan@...eaurora.org>
Cc:	devicetree@...r.kernel.org, linux-arm-msm@...r.kernel.org,
	agross@...eaurora.org, linux-kernel@...r.kernel.org,
	linux-i2c@...r.kernel.org, iivanov@...sol.com,
	galak@...eaurora.org, dmaengine@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, andy.gross@...aro.org,
	ntelkar@...eaurora.org, architt@...eaurora.org
Subject: Re: [PATCH V7 3/6] i2c: qup: Transfer each i2c_msg in i2c_msgs
 without a stop bit

On Tue, Jan 19, 2016 at 03:32:43PM +0530, Sricharan R wrote:
> The definition of i2c_msg says that
> 
> "If this is the last message in a group, it is followed by a STOP.
> Otherwise it is followed by the next @i2c_msg transaction segment,
> beginning with a (repeated) START"
> 
> So the expectation is that there is no 'STOP' bit inbetween individual
> i2c_msg segments with repeated 'START'. The QUP i2c hardware has no way
> to inform that there should not be a 'STOP' at the end of transaction.
> The only way to implement this is to coalesce all the i2c_msg in i2c_msgs
> in to one transaction and transfer them. Adding the support for the same.
> 
> This is required for some clients like touchscreen which keeps
> incrementing counts across individual transfers and 'STOP' bit inbetween
> resets the counter, which is not required.
> 
> This patch adds the support in non-dma mode.
> 
> Signed-off-by: Sricharan R <sricharan@...eaurora.org>
> Reviewed-by: Andy Gross <andy.gross@...aro.org>
> Tested-by: Archit Taneja <architt@...eaurora.org>
> Tested-by: Telkar Nagender <ntelkar@...eaurora.org>

Shortened the commit message and applied to for-next, thanks!


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